K30P64M72SF1 Datasheet, PDF (41/68 Pages) Freescale Semiconductor, Inc – K30 Sub-Family

Peripheral operating requirements and behaviors
Figure 14. Typical ENOB vs. ADC_CLK for 16-bit single-ended mode
6.6.1.3 16-bit ADC with PGA operating conditions
Table 25. 16-bit ADC with PGA operating conditions
Symbol
V_DDA
V_REFPGA
Description
Supply voltage
PGA ref voltage
Conditions
Absolute
V_ADIN
V_CM
R_PGAD
R_AS
T_S
Input voltage
Input Common
Mode range
Differential input Gain = 1, 2, 4, 8
impedance
Gain = 16, 32
Gain = 64
Analog source
resistance
ADC sampling
time
Min.
1.71
Typ.¹
—
Max.
3.6
VREF_OU VREF_OU VREF_OU
T
T
T
V_SSA
—
V_DDA
V_SSA
—
V_DDA
—
128
—
—
64
—
—
32
—
—
100
—
Unit
V
V
V
V
kΩ
Ω
1.25
—
—
µs
Table continues on the next page...
Notes
2, 3
IN+ to IN-⁴
5
6
K30 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
41