MC33662LEF Datasheet, PDF (27/31 Pages) Freescale Semiconductor, Inc – LIN 2.1 / SAEJ2602-2, LIN Physical Layer

TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
The 33662 can be configured for several applications.
Figure 30 and 31 show master and slave node applications.
An additional pull-up resistor of 1.0 k in series with a diode
between the INH and LIN pins must be added when the
device is used in the master node.
VBAT
D1
C1
22µF
C2
100nF
R4
R2
R3
2.2k 18k 18k
VSUP
I/O
Regulator VDD
MCU
12V
5V or
VDD
RXD
3.3V
TXD
*: Optional. 2.2k if implemented
EN
VDD
** _RXD
TXD
WAKE
C3
100nF
X1
200 k
35µA
INH_ON
Control
Unit
EN_RXD
EN_sleep
RXD_Int _Receiver
30 k
LIN_en
TXD_Int
Slope
Control
GND
Figure 30. Master Node Typical Application
INH
D2
725 k
LIN
R1
1.0 k
LIN Bus
VBAT
D1
C1
22µF
C2
100nF
R4
R2
R3
2.2k 18k 18k
I/O
Regulator VDD
MCU
12V
5V or
VDD
RXD
3.3V
TXD
EN
VDD
*^* _RXD
TXD
WAKE
C3
100nF
X1
200 k
35µA
VSUP
INH_ON
Control
Unit
EN_RXD
EN_sleep
RXD_Int _Receiver
30 k
LIN_en
TXD_Int
Slope
Control
GND
*: Optional. 2.2k if implemented
Figure 31. Slave Node Typical Application
INH
725 k
LIN
LIN Bus
Analog Integrated Circuit Device Data
Freescale Semiconductor
33662
27