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MC33662LEF Datasheet, PDF (22/31 Pages) Freescale Semiconductor, Inc – LIN 2.1 / SAEJ2602-2, LIN Physical Layer
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
Receiver Characteristics
The receiver thresholds are ratiometric with the device
supply pin.
If the VSUP voltage goes below the VSUP undervoltage
threshold (VUVL, VUVH), the bus enters into a recessive state
even if communication is sent to TXD.
In case of LIN thermal shutdown, the transceiver and
receiver are in recessive and INH turned off. When the
temperature is below the TLINSD, INH and LIN will be
automatically enabled.
The Fast Baud Rate selection is reported by the RXD pin.
Fast Baud Rate is activated by the toggle function (See
Figure 22). At the end of the toggle function, just after EN
rising edge, RXD pin is kept low for t5 to flag the Fast Baud
Rate entry (See Figure 22).
To exit the Fast Baud Rate and return in Normal or Slow
baud rate, a toggle function is needed. At the end of the
toggle function, the RXD pin stays high to signal Fast Baud
Rate exit (See Figure 23). The device enters into Fast Baud
Rate at room and hot temperature.
DATA INPUT PIN (TXD)
The TXD input pin is the MCU interface to control the state
of the LIN output. When TXD is LOW (dominant), LIN output
is LOW; when TXD is HIGH (recessive), the LIN output
transistor is turned OFF. TXD pin thresholds are 3.3 V and
5.0 V compatible.
This pin has an internal pull-up current source to force the
recessive state if the input pin is left floating.
If the pin stays low (dominant sate) more than 5.0 ms
(typical value), the LIN transmitter goes automatically into
recessive state.
DATA OUTPUT PIN (RXD)
RXD output pin is the MCU interface, which reports the
state of the LIN bus voltage.
In Normal or Slow baud rate, LIN HIGH (recessive) is
reported by a high voltage on RXD; LIN LOW (dominant) is
reported by a low voltage on RXD.
The RXD output structure is a tristate output buffer (See
Figure 28).
RXD
LIN_RXD
EN
X1
200 k
VSUP
EN_RXD
30 k
Receiver
LIN
Slope
Control
Figure 28. RXD Interface
The RXD output pin is the receiver output of the LIN
interface. The low level is fixed. The high level is dependent
on EN voltage. If EN is set at 3.3 V, RXD VOH is 3.3 V. If EN
is set at 5.0 V, RXD VOH is 5.0 V.
In Sleep mode, RXD is high-impedance. When a wake-up
event is recognized from the WAKE pin or from the LIN bus
pin, RXD is pulled LOW to report the wake-up event. An
external pull-up resistor may be needed.
ENABLE INPUT PIN (EN)
EN input pin controls the operation mode of the interface.
If EN = 1, the interface is in Normal mode, TXD to LIN after
tFIRST_DOM delay and LIN to RXD paths are both active. EN
pin thresholds are 3.3 V and 5.0 V compatible. RXD VOH
level follows EN pin high level. The device enters the Sleep
mode by setting EN LOW for a delay higher than tSD (70 µs
typ. value) and if the WAKE pin state doesn’t change during
this delay (see Figure 25).
A combination of the logic levels on the EN and TXD pins
allows the device to enter into the Fast Baud Rate mode of
operation (see Figure 22).
INHIBIT OUTPUT PIN (INH)
The INH output pin is connected to an internal high side
power MOSFET. The pin has two possible main functions. It
can be used to control an external switchable voltage
regulator having an inhibit input. It can also be used to drive
the LIN bus external resistor in the master node application,
thanks to its high drive capability. This is illustrated in
Figure 30 and 31.
In Sleep mode, INH is turned OFF. If a voltage regulator
inhibit input is connected to INH, the regulator will be
disabled. If the master node pull-up resistor is connected to
INH, the pull-up resistor will be unpowered and left floating.
In case of a INH thermal shutdown, the high side is turned
off and the LIN transmitter and receiver are in recessive state.
An external 10 to 100 pF capacitor on INH pin is advised
in order to improve EMC performances.
33662
22
Analog Integrated Circuit Device Data
Freescale Semiconductor