MC81F4332 Datasheet, PDF (198/198 Pages) Finechips – ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC81F4x16
NO. MNEMONIC
24 TCALL n
OP
BYTE CYCLE
CODE NO
NO
OPERATION
M( sp )  ( pcL ), sp  sp – 1,
pcL  ( upage ), pcH  “0FFH”
FLAG
NVGBHIZC
nA
1
8
Table call
M( sp )  ( pcH ), sp  sp – 1,
M( sp )  ( pcL ), sp  sp – 1,
pcL  ( Table vector L ), pcH  (Table vector H )
--------
Control Operation / Etc
NO. MNEMONIC
OP
BYTE CYCLE
CODE NO
NO
OPERATION
1
BRK
0F
1
8
2
DI
60
1
3
3
EI
E0
1
3
4
NOP
FF
1
2
5
POP A
0D
1
4
6
POP X
2D
1
4
7
POP Y
4D
1
4
8
POP PSW
6D
1
4
9
PUSH A
0E
1
4
10 PUSH X
2E
1
4
11 PUSH Y
4E
1
4
12 PUSH PSW
6E
1
4
13 RET
6F
1
5
14 RETI
15 STOP
7F
1
6
EF
1
3
Software interrupt : B  “1”,
M( sp )  ( pcH ), sp  sp – 1,
M( sp )  ( pcL ), sp  sp – 1,
M( sp )  ( PSW ), sp  sp – 1,
pcL  ( 0FFDEH ), pcH  ( 0FFDFH )
Disable interrupt : I  “0”
Enable interrupt : I  “1”
No operation
sp  sp + 1, A  M( sp )
sp  sp + 1, X  M( sp )
sp  sp + 1, Y  M( sp )
sp  sp + 1, PSW  M( sp )
M( sp )  A, sp  sp - 1
M( sp )  X, sp  sp - 1
M( sp )  Y, sp  sp - 1
M( sp )  PSW, sp  sp - 1
Return from subroutine
sp  sp + 1, pcL  M( sp ),
sp  sp + 1, pcH  M( sp )
Return from interrupt
sp  sp + 1, PSW  M( sp ),
sp  sp + 1, pcL  M( sp ),
sp  sp + 1, pcH  M( sp )
Stop mode ( halt CPU, stop oscillator )
FLAG
NVGBHIZC
---1-0--
-----0--
-----1--
--------
--------
restored
--------
--------
restored
--------
198
October 19, 2009 Ver.1.35