MC81F4332 Datasheet, PDF (196/198 Pages) Finechips – ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC81F4x16
BIT manipulation
NO. MNEMONIC
OP
BYTE CYCLE
CODE NO
NO
OPERATION
1
AND1 M.bit
8B
3
4
Bit AND C-flag : C  ( C ) ∧ ( M.bit )
2
AND1B M.bit
8B
3
4
Bit AND C-flag and NOT :
C  ( C ) ∧ ~( M.bit )
3
BIT dp
4
BIT !abs
0C
2
4
1C
3
5
Bit test A with memory :
Z  ( A ) ∧ ( M ), N  ( M7 ), V  ( M6 )
5
CLR1 dp.bit
y1
2
4
Clear bit : ( M.bit )  “0”
6
CLRA1 A.bit
2B
2
2
Clear A bit : ( A.bit )  “0”
7
CLRC
20
1
2
Clear C-flag : C  “0”
8
CLRG
40
1
2
Clear G-flag : G  “0”
9
CLRV
80
1
2
Clear V-flag : V  “0”
10 EOR1 M.bit
AB
3
5
Bit exclusive-OR C-flag : C  ( C )  ( M.bit )
11 EOR1B M.bit
AB
3
5
Bit exclusive-OR C-flag and NOT :
C  ( C )  ~( M.bit )
12 LDC M.bit
CB
3
4
Load C-flag : C  ( M.bit )
13 LDCB M.bit
CB
3
4
Load C-flag with NOT : C  ~( M.bit )
14 NOT1 M.bit
4B
3
5
15 OR1 M.bit
6B
3
5
Bit complement : ( M.bit )  ~( M.bit )
Bit OR C-flag : C  C ∨ ( M.bit )
16 OR1B M.bit
6B
3
5
Bit OR C-flag and NOT : C  C ∨ ~ ( M.bit )
17 SET1 dp.bit
x1
2
4
Set bit : ( M.bit )  “1”
18 SETA1 A.bit
0B
2
2
Set A bit : ( A.bit )  “1”
19 SETC
A0
1
2
Set C-flag : C  “1”
20 SETG
C0
1
2
Set G-flag : G  “1”
21 STC M.bit
EB
3
6
Store C-flag : ( M.bit )  C
22 TCLR1 !abs
5C
3
6
Test and clear bits with A :
A – ( M ), ( M )  ( M ) ∧ ~( A )
23 TSET1 !abs
3C
3
6
Test and set bits with A :
A – ( M ), ( M )  ( M ) ∨ ( A )
FLAG
NVGBHIZC
-------C
-------C
MM----Z-
--------
--------
-------0
--0-----
-0--0---
-------C
-------C
-------C
-------C
--------
-------C
-------C
--------
--------
-------1
--1-----
--------
N-----Z-
N-----Z-
196
October 19, 2009 Ver.1.35