FMS7401L_05 Datasheet, PDF (24/81 Pages) Fairchild Semiconductor – Digital Power Controller

FMS7401L
Figure 7. Current Generator Interface
Control
Voltage
Vcc
G3/AIN1
Analog
Mux
ADC
PRODUCT SPECIFICATION
1. Refer to the Electrical Characteristics section of the datasheet for details.
2. Refer to the PWM Timer 1 Circuit section of the datasheet for details regarding the ADSTROBE signal configuration.
3. Refer to Table 30 of the Device Memory section of the datasheet for the detailed memory map.
4. On the FMS7401L 8-pin device, the SR_GND is internally bonded to the GND pin.
5. Hardware interrupts are not executed by the microcontroller core unless the Global Interrupt enable (G) flag of the Status register is set. Refer to the 8-Bit
Microcontroller Core section of the datasheet for details.
6. The ADC hardware interrupt will be executed in the defined priority order. Refer to the 8-Bit Microcontroller Core section of the datasheet for details.
7. Assuming the internal oscillator frequency is FOSC=2MHz as specified in the Electrical Characteristics section of the datasheet.
8. The upper FOSC frequency (4MHz) is not a standard feature offered on the FMS7401L devices but is available upon request.
9. Refer to the I/O Ports section of the datasheet for details.
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REV. 1.0.3 1/24/05