ACE1502 Datasheet, PDF (21/33 Pages) Fairchild Semiconductor – Arithmetic Controller Engine for Low Power Applications

8. Multi-Input Wakeup/Interrupt Block
The Multi-Input Wakeup (MIW)/Interrupt contains three
memory-mapped registers associated with this circuit: WKEDG
(Wakeup Edge), WKEN (Wakeup Enable), and WKPND
(Wakeup Pending). Each register has 8-bits with each bit
corresponding to an input pins as shown in Figure 27. All three
registers are initialized to zero upon reset.
The WKEDG register establishes the edge sensitivity for each
of the wake-up input pin: either positive going-edge (0) or
negative-going edge (1).
The WKEN register enables (1) or disables (0) each of the port
pins for the Wakeup/Interrupt function. The wakeup I/Os used
for the Wakeup/Interrupt function must also be configured as an
input pin in its associated port configuration register. However,
an interrupt of the core will not occur unless interrupts are
enabled for the block via bit 7 of the T0CNTRL register (see Fig-
ure 19) and the G (global interrupt enable) bit of the SR is set.
The WKPND register contains the pending flags corresponding
to each of the port pins (1 for wakeup/interrupt pending, 0 for
wakeup/interrupt not pending). If an I/O is not selected to
become a wakeup input, the pending flag will not be generated.
To use the Multi-Input Wakeup/Interrupt circuit, perform the
steps listed below making sure the MIW edge is selected before
enabling the I/O to be used as a wakeup input thus preventing
false pending flag generation. This same procedure should be
used following any type of reset because the wakeup inputs are
left floating after resets resulting in unknown data on the port
inputs.
1. Clear the WKEN register.
- CLR WKEN
2. Clear the WKPND register to cancel any pending bits.
- CLR WKPND
3. If necessary, write to the port configuration register to select
the desired port pins to be configured as inputs.
- RBIT 4, PORTGC
; G4
4. If necessary, write to the port data register to select the
desired port pins input state.
- SBIT 4, PORTGD
; Pull-up
5. Write the WKEDG register to select the desired type of edge
sensitivity for each of the pins used.
- LD WKEDG, #0FFH ; All negative-going edges
6. Set the WKEN bits associated with the pins to be used, thus
enabling those pins for the Wakeup/Interrupt function.
- LD WKEN, #10H
; Enabling G4
Once the Multi-Input Wakeup/Interrupt function has been con-
figured, a transition sensed on any of the I/O pins will set the
corresponding bit in the WKPND register. The WKPND bits,
where the corresponding enable (WKEN) bits are set, will bring
the device out of the HALT mode and can also trigger an inter-
rupt if interrupts are enabled. The interrupt service routine can
read the WKPND register to determine which pin sensed the
interrupt.
The interrupt service routine or other software should clear the
pending bit. The device will not enter HALT mode as long as a
WKPND pending bit is pending and enabled. The user has the
responsibility of clearing the pending flags before attempting to
enter the HALT mode.
Upon reset, the WKEDG register is configured to select posi-
tive-going edge sensitivity for all wakeup inputs. If the user
wishes to change the edge sensitivity of a port pin, use the fol-
lowing procedure to avoid false triggering of a Wakeup/Interrupt
condition.
1. Clear the WKEN bit associated with the pin to disable that
pin.
2. Clear the WKPND bit associated with the pin.
3. Write the WKEDG register to select the new type of edge
sensitivity for the pin.
4. Set the WKEN bit associated with the pin to re-enable it.
PORTG provides the user with three fully selectable, edge sen-
sitive interrupts that are all vectored into the same service sub-
routine. The interrupt from PORTG shares logic with the wakeup
circuitry. The WKEN register allows interrupts from PORTG to
be individually enabled or disabled. The WKEDG register speci-
fies the trigger condition to be either a positive or a negative
edge. The WKPND register latches in the pending trigger condi-
tions.
Since PORTG is also used for exiting the device from the HALT
mode, the user can elect to exit the HALT mode either with or
without the interrupt enabled. If the user elects to disable the
interrupt, then the device restarts execution from the point at
which it was stopped (first instruction cycle of the instruction fol-
lowing HALT mode entrance instruction). In the other case, the
device finishes the instruction that was being executed when
the part was stopped and then branches to the interrupt service
routine. The device then reverts to normal operation.
Figure 26. Multi-input Wakeup (MIW) Register bit assignments
WKEDG, WKEN, WKPND
Bit 7
9 _G7
Bit 6
9 _G6
Bit 5
G5
Bit 4
G4
Bit 3
G3
Bit 2
G2
Bit 1
G1
Bit 0
G0
9. Available only on the 14-pin package option
21
ACE1502 Product Family Rev. 1.7
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