XR88C681J-F Datasheet, PDF (90/101 Pages) Exar Corporation – Two Full Duplex, Independent Channels

XR88C681
Bit 7
BRG Set
Select
0 = Set1
1 = Set2
Bit 6
Bit 5
Bit 4
Counter/Timer #1 Mode and Source
See Table 7
Bit 3
Delta IP3
Interrupt
0 = OFF
1 = ON
Bit 2
Delta IP2
Interrupt
0 = OFF
1 = ON
Table 35. Auxiliary Control Register: ACR
Bit 1
Delta IP1
Interrupt
0 = OFF
1 = ON
Bit 7
Delta IP3
0 = No
1 = Yes
Bit 6
Delta IP2
0 = No
1 = Yes
Bit 5
Delta IP1
0 = No
1 = Yes
Bit 4
Delta IP0
0 = No
1 = Yes
Bit 3
IP3
0 = Low
1 = High
Bit 2
IP2
0 = Low
1 = High
Table 36. Input Port Configuration Register , IPCR
Bit 1
IP1
0 = Low
1 = High
Bit 7
Input Port
Change
0 = No
1 = Yes
Bit 6
Delta Break
B
0 = No
1 = Yes
Bit 5
RXRDY/
FFULLB
0 = No
1 = Yes
Bit 4
TXRDYB
0 = No
1 = Yes
Bit 3
Counter #1
Ready
0 = No
1 = Yes
Bit 2
Delta Break
A
0 = No
1 = Yes
Table 37. Interrupt Status Register, ISR
Bit 1
RXRDY/
FFULLA
0 = No
1 = Yes
Bit 7
Input Port
Change
0 = Off
1 = On
Bit 6
Delta Break
B
0 = Off
1 = On
Bit 5
RXRDY/
FFULLB
0 = Off
1 = On
Bit 4
TXRDYB
0 = Off
1 = On
Bit 3
Counter #1
Ready
0 = Off
1 = On
Bit 2
Delta Break
A
0 = Off
1 = On
Table 38. Interrupt Mask Register, IMR
Bit 1
RXRDY/
FFULLA
0 = Off
1 = On
Bit 7
C/T(15)
Bit 6
C/T(14)
Bit 5
C/T(13)
Bit 4
C/T(12)
Bit 3
C/T(11)
Bit 2
C/T(10)
Table 39. Counter/Timer Upper Byte Register, CTUR
Bit 1
C/T(9)
Bit 7
C/T(7)
Bit 6
C/T(6)
Bit 5
C/T(5)
Bit 4
C/T(4)
Bit 3
C/T(3)
Bit 2
C/T(2)
Table 40. Counter/Timer Lower Byte Register, CTLR
Bit 1
C/T(1)
Bit 7
IVR(7)
Bit 6
IVR(6)
Bit 5
IVR(5)
Bit 4
IVR(4)
Bit 3
IVR(3)
Bit 2
IVR(2)
Table 41. Interrupt Vector Register: IVR
Bit 1
IVR(1)
Rev. 2.11
90
Bit 0
Delta IP0
Interrupt
0 = OFF
1 = ON
Bit 0
IP0
0 = Low
1 = High
Bit 0
TXRDYA
0 = No
1 = Yes
Bit 0
TXRDYA
0 = Off
1 = On
Bit 0
C/T(8)
Bit 0
C/T(0)
Bit 0
IVR(0)