XR88C681J-F Datasheet, PDF (56/101 Pages) Exar Corporation – Two Full Duplex, Independent Channels

XR88C681
and Receivers. Table 17 and Table 18 present the relationship between the contents of the CSRs and the clock source
driving the Transmitters and Receivers.
Bit 7
Bit 6
Bit 5
Receiver Clock Select
See Table 18
Bit 4
Bit 3
Bit 2
Bit 1
Transmitter Clock Select
See Table 18
Bit 0
Table 17. Bit Format of the Clock Select Registers, CSRA and CSRB
Field
Bit Rate
CSR[7:4]
ACR[7] = 0
ACR[7] = 1
CSR[3:0]
X=0
X=1
X=0
X=1
0
0
0
0
50
75
75
50
0
0
0
1
110
110
110
110
0
0
1
0
134.5
134.5
134.5
134.5
0
0
1
1
200
150
150
200
0
1
0
0
300
3600
300
3600
0
1
0
1
600
14.4K
600
14.4K
0
1
1
0
1200
28.8K
1200
28.8K
0
1
1
1
1050
57.6K
2000
57.6K
1
0
0
0
2400
115.2K
2400
115.2K
1
0
0
1
4800
4800
4800
4800
1
0
1
0
7200
1800
1800
7200
1
0
1
1
9600
9600
9600
9600
1
1
0
0
38.4K
19.2K
19.2K
38.4K
1
1
0
1
Timer
Timer
Timer
Timer
1
1
1
0
External - 16X
External - 16X
External - 16X
External - 16X
1
1
1
1
External - 1X
External - 1X
External - 1X
External - 1X
Note: the b suffix denotes a binary expression. x = don’t care value.
Table 18. Bit Format of the Clock Select Registers, CSR[3:0] and CSR[7:4]
Please note that Table 18 calls for the user to specify the
following parameters:
D ACR[7] - the most significant bit (MSB) of the Auxil-
iary Control Register
D X - The Extend bit
ACR[7] is the MSB of the Auxiliary Control Register, and
can easily be programmed by writing 1xxxxxxxb or
0xxxxxxxb to the ACR, in order to set or clear,
respectively.
X - The Select Extend bit
Each transmitter and receiver, within the DUART has an
extend bit that can be set or cleared by writing the
appropriate data to the channel’s Command Register.
Although this information can be found in Table 3.
Table 19 summarizes these commands, and their effect
on the Extend bits.
Rev. 2.11
56