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XR88C681J-F Datasheet, PDF (65/101 Pages) Exar Corporation – Two Full Duplex, Independent Channels | |||
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XR88C681
data, at the Data Bus, specifying the bits, within the OPR,
to be set ( 1 = set, 0 = no change). A bit is cleared by the
address triggered âCLEAR OUTPUT PORT BITSâ
command (see Table 1) with the accompanying data, at
the Data Bus, specifying the bits to be reset (1 = cleared, 0
= no change).
F.1 Writing Data to the OPR/Output Port Pins
As mentioned earlier, the state of the OPR and
consequently, the Output Port pins is controlled by two
âAddress Triggeredâ commands.
D Set Output Port Bits Command
D Clear Output Port Bits Command
The procedure and effect of using these commands are
discussed in Section F.1.1.
F.1.1 Set Ouput Port Bits Command
The actual procedure used to invoke the âSET OUTPUT
PORT BITSâ command is the same as writing the
contents on the Data Bus (D7 - D0) to DUART Address
0E16 for (OP7 - OP0). For every â1â that exists within the
latched contents of the Data Bus, the corresponding bit,
within the OPR is set to a logic âhighâ. For every â0â that is
present on the data bus and is written to DUART Address
0E16, the state of the corresponding bit, within the OPR is
unchanged.
We could state this another way as: For every â1â that is
present on the Data Bus, during the use of the âSET
OUTPUT PORT BITSâ command, the corresponding
Output Port pin is set to a logic âlowâ. And for every â0â that
is present on the Data Bus, during this command, the
state of the corresponding Output Port pin is unchanged.
For Example:
Suppose that the content of the OPR are OPR[7:0] = [0, 0,
0, 0, 1, 1, 1, 1]. Hence, the state of the Output Port pins
are as follows:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [1, 1, 1, 1,
0, 0, 0, 0]
If we write the following to DUART Address 0E16;
[D7,...,D0] = [1, 1, 1, 1, 0, 0, 0, 0]; the resulting state of the
Output Port Register Bits follows:
OPR[7:0] = [1, 1, 1, 1, 1, 1, 1, 1].
Consequently, the state of the Output Port pins are as
follows:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [0, 0, 0, 0,
0, 0, 0, 0]
This example of the âSET OUTPUT PORT BITSâ
command is illustrated in Figure 33.
Initial OPR[7:0] 0 0 0 0 1 1 1 1
State of Output Port Pins (OP7 - OP0)
1 11 1 00 0 0
Data Bus, D7 - D0
1 1 11000 0
DUART Address 0Eh
Final OPR[7:0]
1 11 1 111 1
00 0 00 0 00
Figure 33. Illustration of the âSET OUTPUT PORT BITâ Command and its Effect
on the Output Port Register and the State of the Output Port Pins.
Rev. 2.11
65
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