XR88C681J-F Datasheet, PDF (34/101 Pages) Exar Corporation – Two Full Duplex, Independent Channels

XR88C681
RST 6.5
AD0 - AD7
ALE
A15 - A8
-IO/M
-RD
-WR
8085 CPU
V_cc
D
Q
C
74LS373
A7 - A4
Address Decoding
Logic
-IOR
-MEMR
-IOW
-MEMW
-INTR
D0 - D7
A0 - A3
-CS
-RD
-WR
XR88C681
Figure 10. The XR88C681/8085 CPU Interface for Direct Interrupt Processing
(Interrupt Service Routine is located at 0034₁₆ in System Memory)
Figure 11 presents a schematic where the DUART will request a “External-Vectored” Interrupt to the 8085 CPU. In this
case, the Interrupt Service Routine for the DUART must begin at 0020₁₆ in system memory.
Rev. 2.11
34