XR88C681J-F Datasheet, PDF (66/101 Pages) Exar Corporation – Two Full Duplex, Independent Channels

XR88C681
In summary, for the “SET OUTPUT PORT BITS”
command;
Dn = 0; results in no change for OPR[n], nor Output Port
pin OPn.
Dn = 1; results in OPR[n] = “1”, and Output Port pin, OPn =
“0”
F.1.2 Clear Output Port Bits Command
The procedure for invoking this command is very similar
to that for “SET OUTPUT PORT BITS COMMAND”;
except in that the user now writes to DUART address 0F₁₆
for [OP7,...,OP0].
For every “1” that is “written” to this address, the
corresponding bit in the OPR register is set to a logic “low”
and the corresponding Output Port pin, OPn is set to a
logic “high”. For every “0” that is written to this address,
the state of the corresponding OPR register bit, and in
turn the state of the Output Port pin is unchanged.
For Example:
Suppose that the contents of the Output Port Register,
OPR = [1, 1, 1, 1, 1, 1, 1, 1]. Consequently, the state of the
Output Port pins are:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [0, 0, 0, 0,
0, 0, 0, 0]
If we were to write [D7,...,D0] = [1, 1, 1, 1, 0, 0, 0, 0] to
DUART address 0F16, the resulting contents of the
Output Port register will be:
OPR[7:0] = [0, 0, 0, 0, 1, 1, 1, 1]
Further, the resulting state of the Output Port pins will be:
[OP7, OP6, OP5, OP4, OP3, OP2, OP1, OP0] = [1, 1, 1, 1,
0, 0, 0, 0]
This example of the “SET OUTPUT PORT BITS”
command is illustrated in Figure 34.
Initial OPR [7:0] 1 1 1 1 1 1 1 1
State of the Output Port Pins (OP7-OP0)
0 00 00 0 0 0
Data Bus, D7 - D0 _{1 1 1 1 0 0 0 0}
DUART Address 0Fh
Final OPR [7:0] 0 0 0 0 1 1 1 1
1 1 1 1 00 0 0
Figure 34. Illustration of the “CLEAR OUTPUT PORT BIT” Command and its Effect
on the Output Port Register and the State of the Output Port Pins.
In summary, for the “CLEAR OUTPUT PORT BITS”
command;
Dn = 0, results in no change for OPR[n] and no change in
the state of the Output Port pin, OPn.
Dn = 1, results in OPR[n] = 0, and sets the corresponding
Output Port pin to a logic “1”.
Rev. 2.11
66