XRT83L30_06 Datasheet, PDF (8/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PIN DESCRIPTIONS BY FUNCTION
REV. 1.0.1
SERIAL INTERFACE
SIGNAL NAME
PIN #
HW/HOST
20
SDI
21
EQC4
SDO
22
EQC3
SCLK
23
EQC2
CS
24
EQC1
INT
25
EQC0
TYPE
I
I
DESCRIPTION
Mode Control Input
This pin is used for selecting Hardware or Host mode to control the device.
Leave this pin unconnected or tie “High” to select Hardware mode. For Host
mode, this pin must be tied “Low”.
NOTE: Internally pulled “High” with a 50kΩ resistor.
Serial Data Input
In Host mode, this pin is the data input for the Serial Interface.
Equalizer Control Input 4
Hardware mode, SEE”CONTROL FUNCTION” ON PAGE 13.
O Serial Data Output
In Host mode, this pin is the output “Read” data for the serial interface.
I
Equalizer Control Input 3
Hardware mode, SEE”CONTROL FUNCTION” ON PAGE 13.
I
Serial Interface Clock Input
In Host mode, this clock signal is used to control data “Read” or “Write” oper-
ation for the Serial Interface. Maximum clock frequency is 20MHz.
Equalizer Control Input 2
Hardware mode, SEE”CONTROL FUNCTION” ON PAGE 13.
I
Chip Select Input
In Host mode, tie this pin “Low” to enable communication with the device via
the Serial Interface.
Equalizer Control Input 1
Hardware mode, SEE”CONTROL FUNCTION” ON PAGE 13.
O Interrupt Output (active "Low")
In Host mode, this pin goes “Low” to indicate an alarm condition has
occurred within the device. Interrupt generation can be globally disabled by
setting the GIE bit to “0” in the command control register.
I
Equalizer Control Input 0
Hardware mode, SEE”CONTROL FUNCTION” ON PAGE 13.
NOTE: This pin is an open drain output and requires an external 10kΩ pull-
up resistor.
5