XR17V254_08 Datasheet, PDF (56/70 Pages) Exar Corporation – 66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT

XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.1
5.20 XCHAR REGISTER, READ ONLY
This register gives the status of the last sent control character (Xon or Xoff) and the last received control
character (Xon or Xoff). This register will be reset to 0x00 if, at anytime, the Software Flow Control is disabled.
XCHAR [7:4]: Reserved
XCHAR [3]: Transmit Xon Indicator
If the last transmitted control character was a Xon character or characters (Xon1, Xon2), this bit will be set to a
logic 1. This bit will clear after the read.
XCHAR [2]: Transmit Xoff Indicator
If the last transmitted control character was a Xoff character or characters (Xoff1, Xoff2), this bit will be set to a
logic 1. This bit will clear after the read.
XCHAR [1]: Xon Detect Indicator
If the last received control character was a Xon character or characters (Xon1, Xon2), this bit will be set to a
logic 1. This bit will clear after the read.
XCHAR [0]: Xoff Detect Indicator
If the last received control character was a Xoff character or characters (Xoff1, Xoff2), this bit will be set to a
logic 1. This bit will clear after the read.
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