XR17V254_08 Datasheet, PDF (36/70 Pages) Exar Corporation – 66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT

XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.1
TABLE 14: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4.
ADDRESS ^REG
A3-A0 ^NAME
READ/
WRITE
BIT [7]
BIT [6]
BIT [5]
BIT [4]
BIT [3] BIT [2] BIT[1] BIT [0] COMMENT
0 0 0 0 RHR R BIT [7] BIT [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=0
0 0 0 0 THR W BIT [7] BIT [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=0
0 0 0 0 DLL R/W BIT [7] BIT [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1
0 0 0 1 DLM R/W BIT [7] BIT [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1
0 0 1 0 DLD R/W
0
0
0
0
Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1
0 0 0 1 IER R/W
0/
0/
0/
0
CTS/
DSR#
Int.
Enable
RTS/
DTR#
Int.
Enable
Xon/
Xoff/Sp.
Char. Int.
Enable
Modem
Status
Int.
Enable
RX Line
Status
Int.
Enable
TX
Empty
Int.
Enable
RX Data
Int.
Enable
LCR[7]=0
0 0 1 0 ISR
R FIFOs FIFOs
0/
0/
INT
INT
INT
INT
Enable Enable
Delta-
Flow
Xoff/spe-
cial char
Source
Bit [3]
Source
Bit [2]
Source
Bit [1]
Source _LCR[7]=0
Bit [0]
Cntl
0 0 1 0 FCR
W RXFIFO RXFIFO 0/
0/
Trigger Trigger
TXFIFO TX FIFO
Trigger Trigger
DMA TX FIFO RX FIFO FIFOs
Mode Reset Reset Enable _LCR[7]=0
0011
LCR
R/W Divisor Set TX Set Par- Even Par- Parity Stop Bits Word Word
Enable Break
ity
ity
Enable
Length Length
Bit [1] Bit [0]
0100
MCR
R/W
0/
BRG
Pres-
caler
0/
IR
Enable
0/
XonAny
Internal
Loopback
Enable
(OP2)¹ (OP1)^{1 RTS# DTR#}
Pin Con- Pin Con-
TX char RTS/
trol
trol
Immedi- DTR
ate Flow Sel
0 1 0 1 LSR R/W RX FIFO TSR THR RX Break RX RX Par- RX RX Data
ERROR Empty Empty
Framing ity Error Overrun Ready
Error
0 1 1 0 MSR R
CD
RI
DSR
CTS
Delta Delta Delta Delta
CD#
RI# ^{DSR# CTS#}
MSR
W RS485 RS485 RS485 RS485 Disable Disable
DLY-3 DLY-2 DLY-1 DLY-0
TX
RX
0 1 1 1 SPR R/W Bit [7] Bit [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] User Data
1 0 0 0 FCTR R/W
TRG
Table
Bit [1]
TRG
Table
Bit [0]
Auto
RS485
Enable
Invert IR
RX Input
RTS/
DTR
Hyst
Bit [3]
RTS/
DTR
Hyst
Bit [2]
RTS/
DTR
Hyst
Bit [1]
RTS/
DTR
Hyst
Bit [0]
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