XRT4500 Datasheet, PDF (52/99 Pages) Exar Corporation – MULTIPROTOCOL SERIAL NETWORK INTERFACE IC

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XRT4500
MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
REV. 1.0.7
2. The Analog/Line-Side Loop-back:
This loop-back path is referred to as an “Analog/Line-
Side” loop-back, because all signals originate from
and are terminated by the DTE Terminal (over the
line). These signals originate from the DTE Terminal,
and are output, over the line, to the DTE Terminal.
However, these signal (originating from the DTE Ter-
minal) are never converted into the Digital format (by
the DCE Mode XRT4500). These signals are kept in
the “Analog” format, and are looped-back (over the
line) to the DTE Terminal.
The “TXD” signal (originating from the DTE Terminal)
will be transmitted over the line to the DCE Terminal.
However, this signal will not be converted into the dig-
ital format by the “DCE Mode” XRT4500. Instead, this
signal will be loop-back to the DTE Terminal, via the
“RXD” signal path.
NOTE: In this loop-back mode, the “SCTE” signal (e.g., the
companion clock signal to “TXD”) is also received by the
DCE Terminal and is looped-back to the DTE Terminal. In
this case, the SCTE signal will be routed through the “RXC”
path. The DTE SCC can use this signal to sample the TXD
(now RXD signal).
1.3.4 The EC* (Echo Clock Mode - Enable/
Disable Select Input pin)
A wide variety of Serial Communications Controller
(SCCs) are deployed in either “DTE” or “DCE” type of
Data Communications equipment. These SCCs can
be realized in an ASIC solution or they can be a stan-
dard product. An example of a standard product SCC,
would be the Am85C30 from AMD.
One variation that exists among these SCCs are in
the number of “Clock Signals” that these chips use
and process, in order to support Data Communica-
tions over a DTE/DCE Interface. For example, some
SCCs process 3 clock signals in order to support the
transmission/reception of data over a DTE/DCE Inter-
face. Other SCCs process only 2 or 1 clock signals.
Examples of a “3-Clock” and a “2-Clock” DTE/DCE
Interface are presented below.
The “3-Clock” DCE/DTE Interface
Many of the Data Communication Standards (e.g.,
ITU-T V.35, EIA-530(A), etc.) define three clock sig-
nals that are to be transported over the DTE/DCE In-
terface. These tree clock signals are listed below.
• TXC - Transmit Clock
• RXC - Receive Clock
• SCTE (or TXCE) - Transmit Clock Echo
Figure 20 presents an illustration of a DTE and DCE
exchanging data over a “3-Clock DTE/DCE” Interface.
FIGURE 20. ILLUSTRATION OF A TYPICAL “3-CLOCK DCE/DTE” INTERFACE
SCC (L)
TXD
DTE (#1)
63
60
TX1
62
TXD
DCE (#2)
78
RX1
1
79
SCC (R)
TXD_IN
SCTE
64
SCTE
77
67
TX2
65
76
RX2
74
SCTE_IN
TXC_IN
RXC_IN
RXD_IN
70
73
2
RX3
71
77
74
RX2
76
78
1
RX1
79
XRT4500
TXC
RXC
RXD
70
68
71
TX3
64
67
65
TX2
63
60
62
TX1
XRT4500
TXC
RXC
RXD
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