XRT4500 Datasheet, PDF (19/99 Pages) Exar Corporation – MULTIPROTOCOL SERIAL NETWORK INTERFACE IC

XRT4500
MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
REV. 1.0.7
PIN DESCRIPTIONS (CONT.)
áç
PIN
Signal
#
46
E_232H
47
V_DD
48
EN_OUT
49 REG_CLK
DTE
MODE
DCE
MODE
TYPE FUNCTION
I High Speed RS-232 Enable – Logic 0 enables high speed RS-
232 mode (drives 3KΩ in parallel with 1000pF at 256 KHz).
Internal 20KΩ pull-up to VDD.
This input pin permits the user to either enable or disable the
‘High-Speed RS-232 Driver’ feature. The non high speed mode
provides a 120 Kbps clock rate.
Note: This pin setting applies to all ‘RS-232/V.28 Drivers’ within
the XRT4500.
Analog VDD for the Internal Switching Regulator
I Output Enable Pin for Receiver 5 and 8
This active-low output pin permits the user to tri-state the
“RX5D” and “RX8D” output pins (Pins 23 & 33).
Setting this input pin “low” causes the XRT4500 to tri-state the
“RX5D” and “RX8D” output pins. Conversely, setting this input
pin “high” enables the “RX5D” and the “RX8D” output drivers for
signal transmission to the local Terminal Equipment.
This input pin contains an internal 20kΩ pull-down resistor to
ground.
I Register Mode Clock Input Signal:
If the XRT4500 has been configured to operate in the “Regis-
tered” Mode, then a rising clock edge at this input causes the
XRT4500 to do the following.
• Data at the TX5D and TX8D input pins (Pins 15 & 17) will be
latched into the XRT4500 circuitry.
• Data will be outputted via the RX5D and RX8D pins (Pins 23
& 33).
This input pin has no function when the XRT4500 is operating in
the “Non-Registered” Mode. The user configures the XRT4500
to operate in the “Registered” Mode, by pulling the “REG” input
pin to V_DD.
This input pin contains an internal 20kΩ pull-up to V_DD.
NOTE: Signal names beginning with D_ are digital signals.
NOTE: Signal names ending with B and A are the positive
and negative polarities of differential signals respectively.
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