 English |
|
|
|
|
|
|
|
| XRT4500 Datasheet, PDF (2/99 Pages) Exar Corporation – MULTIPROTOCOL SERIAL NETWORK INTERFACE IC | |||
| |||
| ◁ |
áç
BLOCK DIAGRAM
XRT4500
MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
REV. 1.0.7
-6V
47µF -
Low ESR +
VDD 47
VDD_REG 51
1N5819
4 7µH
7 26 41 56
52
VSS VSS Vsense VSS_T123 SR_OUT
-6V
Switching Regulator
0.5â¦
42
Isense
M0 4
M1 5
M2 6
LATCH 44
Decoder
Latch
XRT4500
2 . 2 µF
43
21 +
22
GND_REG
CPP CPM
+12V
Charge Pump
Mode Select
16 + VPP
1 0 µF
-
31 DEC/DTE
Echo Clock
34 EC
2 or 3 Clock Select 50 2CK/3CK
Loopback
18 LP
CLKFS 45
500 KHz
CLOCK
MODE & CONFIGURATION
CONTROL LOGIC
Invert Clock
Invert Data
54 CLK INV
55 DT INV
32 - 64 KHz
53 OSCEN
SLEW_CNTL 39
R slew
SLEW RATE
CONTROL
E_232H 46
High Speed RS232 Enable
VDD 2
RX1A 78
RX1,2,3
Digital MUX 1
T
RX1
RX1B 79
TX1
RX1D 1
RX2A 77
T
RX2
RX2B 76
TX2
RX2D 74
RX3D 73
GND 3
VDD 20
RX4A 37
RX4B
RX4D
38
40
RX5A 36
RX5B 35
RX5D 33
RX3
RX1,2,3
RX4,5,6,7
RX4
RX5
RX6
RX67D 32
RX7
TX3
Digital MUX 2
Filter
TX4
Filter
TX5
Filter
MUX
Filter
TX6
MUX
TX7
Register
Mode Control
Register Mode
Clock Input
24 REG
49
REG_CLK
TX1,2,3
T
TX1,2,3
T
TX1,2
T
RX4,5,6,7,8
58 VDD_T123
60 TX1D
63 TX1A
61 CM_TX1
62 TX1B 0.1
57 GND
67 TX2D
64 TX2A
66 CM_TX2
65 TX2B 0.1
59
GND_T12
68 TX3D
70 TR3A
69 CM_TR3
71 TR3B 0.1
72 GND
8 TX4D
11 TX4A
10 TX4B
15 TX5D
12 TX5A
13 TX5B
TX4,5,6,7,8 9 VDD
29 TR6A
30 TR6B
28 TX76D
27 TR7
EN_OUT 48
RX8I 25
RX8D 23
EN_FLTR 75
RX8
Glitch Filter
Filter
17 TX8D
TX8
19 TX8O
TX4,5,6,7,8 14 GND
V.11 (RX1,2,3) Termination 80
EN_TERM
2
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese