XRT73LC00A_08 Datasheet, PDF (40/63 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

REV. 1.0.1
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC00A LIU IC is operating in the Training Mode. When the LIU is operating in the Training Mode it does
the following:
A. declares a Loss of Lock indication by toggling the RLOL output pin “High” and
B. outputs a clock signal via the RCLK1 and RCLK2 output pins which is derived from the signal applied to
the EXCLK input pin.
2. The Data/Clock Recovery Mode
If the frequency difference between the line signal and that applied via the EXCLK input pin is less than 0.5%,
the XRT73LC00A LIU IC is operating in the Data/Clock Recovery Mode. In this mode, the Clock Recovery PLL
is locked onto the line signal via the RTIP and RRING input pins.
3.5 The HDB3/B3ZS Decoder
The Remote Transmitting Terminal typically encodes the line signal into some sort of Zero Suppression Line
Code (e.g., HDB3 for E3 and B3ZS for DS3 and STS-1). The purpose of this encoding activity was to aid in the
Clock Recovery process of this data in the Near-End Receiving Terminal. Once the data has made it across
the E3, DS3 or STS-1 Transport Medium and has been recovered by the Clock Recovery PLL, it is now
necessary to restore the original content of the data. The purpose of the HDB3/B3ZS Decoding block is to
restore the data transmitted over the E3, DS3 or STS-1 line to its original content prior to Zero Suppression
encoding.
3.5.1 B3ZS Decoding DS3/STS-1 Applications
If the XRT73LC00A is configured to operate in the DS3 or STS-1 Modes, then the HDB3/B3ZS Decoding Block
performs B3ZS Decoding. When the Decoder is operating in this mode it parses through the incoming Dual-
Rail data and checks for the occurrence of either a “00V” or a “B0V” pattern. If the B3ZS Decoder detects this
particular pattern it substitutes these bits with a “000” pattern.
NOTE: If the B3ZS Decoder detects any bipolar violations that is not in accordance with the”B3ZS Line Code” format, or if
the B3ZS Decoder detects a string of 3 (or more) consecutive “0’s” in the incoming line signal, then the B3ZS
Decoder flags this event as a Line Code Violation by pulsing the LCV output pin “High”.
Figure 18 illustrates the B3ZS Decoder at work with two separate Zero Suppression patterns in the incoming
Dual-Rail Data Stream.
FIGURE 18. AN EXAMPLE OF B3ZS DECODING
Line Signal
RCLK
00 V
B 0V
RPOS
RNEG
Data
01011000101111011011001110001
3.5.2 HDB3 Decoding E3 Applications
If the XRT73LC00A is configured to operate in the E3 Mode, the HDB3/B3ZS Decoding Block performs HDB3
Decoding. When the Decoder is operating in this mode it parses through the incoming Dual-Rail data and
checks for the occurrence of either a “000V” or a “B00V” pattern. If the HDB3 Decoder detects this particular
pattern, it substitutes these bits with a “0000” pattern.
Figure 19 illustrates the HDB3 Decoder at work with two separate Zero Suppression patterns in the incoming
Dual-Rail Data Stream.
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