XRT73LC00A_08 Datasheet, PDF (36/63 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

REV. 1.0.1
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
3.0 THE RECEIVE SECTION
Figure 1 indicates that the XRT73LC00A Receive Section consists of the following blocks:
• AGC/Equalizer
• Peak Detector
• Slicer
• Clock Recovery PLL
• Data Recovery
• HDB3/B3ZS Decoder
The purpose of the XRT73LC00A Receive Section is to take an incoming attenuated/distorted bipolar signal
from the line and encode it back into the TTL/CMOS format where it can be received and processed by digital
circuitry in the Terminal Equipment.
3.1 Interfacing the Receive Section of the XRT73LC00A to the Line
By design, the Receive Section of the XRT73LC00A can be transformer-coupled or capacitive-coupled to the
line. The specification documents for E3, DS3 and STS-1 all specify 75Ohm termination loads when
transmitting over coaxial cable. It is recommended to interface the Receive Section of the XRT73LC00A to the
line as shown in Figure 15 or Figure 16.
FIGURE 15. RECOMMENDED SCHEMATIC FOR INTERFACING THE RECEIVE SECTION OF THE XRT73LC00A TO THE
LINE (TRANSFORMER-COUPLING)
RxPOS
RxNEG
RxLineClk
RxLOS
RxLOL
RPOS
RNEG
RCLK1
RTIP
R1
37.4Ω
RLOS
RLOL
R2
37.4Ω
RRING
C1
0.01uf
BNC
T2
1:1
31