XR17V352IB-0A-EVB Datasheet, PDF(39/64 Page) Exar Corporation – HIGH PERFORMANCE DUAL PCI EXPRESS UART

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XR17V352IB-0A-EVB Datasheet, PDF (39/64 Pages) Exar Corporation – HIGH PERFORMANCE DUAL PCI EXPRESS UART

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REV. 1.0.4

XR17V352

HIGH PERFORMANCE DUAL PCI EXPRESS UART

TABLE 13: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4.

ADDRESS

A3-A0

REG

NAME

READ/

WRITE

BIT [7]

BIT [6]

BIT [5]

BIT [4]

BIT [3] BIT [2] BIT[1] BIT [0] COMMENT

0 0 0 0 RHR R BIT [7] BIT [6] Bit [5]

Bit [4]

Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=0

0 0 0 0 THR W BIT [7] BIT [6] Bit [5]

Bit [4]

Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=0

0 0 0 0 DLL R/W BIT [7] BIT [6] Bit [5]

Bit [4]

Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1

0 0 0 1 DLM R/W BIT [7] BIT [6] Bit [5]

Bit [4]

Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1

0010

DLD

R/W Invert Multi-

RS485 drop

Polarity mode

XON/

XOFF

parity

check

Fast IR

mode

Bit [3] Bit [2] Bit [1] Bit [0] LCR[7]=1

0 0 0 1 IER R/W

CTS/

DSR#

Int.

Enable

RTS/

DTR#

Int.

Enable

Xon/

Xoff/Sp.

Char. Int.

Enable

Modem

Status

Int.

Enable

RX Line

Status

Int.

Enable

Empty

Int.

Enable

RX Data

Int.

Enable

LCR[7]=0

0 0 1 0 ISR

R FIFOs FIFOs

INT

Enable Enable

Delta-

Flow

Xoff/spe-

cial char

Source Source Source

Bit [3] Bit [2] Bit [1]

Source

Bit [0]

LCR[7]=0

Cntl

0 0 1 0 FCR

W RXFIFO RXFIFO 0/

Trigger Trigger

TXFIFO TX FIFO

Trigger Trigger

DMA TX FIFO RX FIFO FIFOs

Mode Reset Reset Enable LCR[7]=0

0011

LCR

R/W Divisor Set TX Set Par- Even Par- Parity Stop Bits Word Word

Enable Break

ity

Enable

Length Length

Bit [1] Bit [0]

0 1 0 0 MCR R/W

Internal (OP2)1 (OP1)1 RTS# DTR#

Loopback

Pin Con- Pin Con-

BRG

IR XonAny Enable TX char RTS/

trol

Pres- Enable

Immedi- DTR

caler

ate Flow Sel

0 1 0 1 LSR

R RX FIFO TSR

THR RX Break RX RX Par- RX RX Data

Error Empty Empty

Framing ity Error Overrun Ready

Error

0 1 1 0 MSR R

DSR

CTS

Delta

CD#

Delta

RI#

Delta

DSR#

Delta

CTS#

MSR

W RS485 RS485 RS485

DLY[3] DLY[2] DLY[1]

RS485

DLY[0]

Disable Disable Disable Disable

RX TX mode RX mode

0 1 1 1 SPR R/W Bit [7] Bit [6] Bit [5]

Bit [4]

Bit [3] Bit [2] Bit [1] Bit [0] User Data

1000

FCTR R/W

TRG

Table

Bit [1]

TRG

Table

Bit [0]

Auto

RS485

Enable

Invert IR

RX Input

RTS/

DTR

Hyst

Bit [3]

RTS/

DTR

Hyst

Bit [2]

RTS/

DTR

Hyst

Bit [1]

RTS/

DTR

Hyst

Bit [0]

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