XRD98L61 Datasheet, PDF (21/37 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 12-Bit A/D

Preliminary
XRD98L61
Chip Reset
The chip includes a Power-On-Reset function (POR)
so when the power supplies are turned on the chip will
always power up with default values in all registers.
There are two methods to force a chip reset. The first
is to write a “1” to the RESET bit in the reset register.
This will reset the chip, and after a delay of about 10
ns, the reset bit will automatically clear itself. The
second reset method is to force the RESET pin high.
This will reset the chip until the RESET pin goes low
again. The RESET pin has an internal pull down.
Black Level Offset Calibration
CCD
signal
CDS
+
PGA
+
12-bit ADC
Reg
DB[11:0]
ManCAL
CDAC, FDAC
Coarse
Accumulator
Fine
Accumulator
From Serial
Interface
Registers
Wait[11:0]
OB Lines[7:0]
Hold, FastCal
DNS[1:0]
PGA[9:0]
OB[7:0]
Offset Calibration Logic
Black Level
Offset Calibration
Loop
12
Hot Pixel
Clipper
DNS
Filter
+
+
-
Pixel
Averager
Figure 8. Black Level Offset Calibration Block Diagram
Rev. P4.00
21