XRD98L61 Datasheet, PDF (19/37 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 12-Bit A/D

Preliminary
XRD98L61
Direct PGA Input Mode
The inputs to the PGA can be accessed directly
(bypassing the CDS) through the Test1 & Test2 pins.
This mode is very useful for testing the PGA gain and
linearity. To enable the Direct PGA Input mode, write
a “1” to the NoCDS bit in the Control register of the
serial interface. This will disconnect the CDS from the
PGA input and turn on the switches that connect the
Test1 & Test2 pins to the PGA.
In this mode the SBLK and SPIX clocks must be
clocked, due to the switched capacitor architecture of
the second PGA stage. ADCLK must be provided to
digitize the PGA output. The analog PGA output
cannot be monitored, it does not come out to any pin.
The calibration logic should be put into the Hold mode,
or into the ManCAL mode. The Coarse offset correc-
tion DAC does not affect the Direct PGA inputs, but the
Fine offset correction DAC does affect the PGA out-
put. The calibration logic is not “aware” that the Coarse
DAC is not active, and thus could cause errors if left
operating automatically.
Input Signal
Test1-Test2
SBLK
SPIX
ADCLK
Input Sampled
Input Sampled
PGA tracks
Input Signal
ADC tracks
PGA output
non-overlap
Figure 7. Direct PGA Input Timing
Rev. P4.00
19