XR17V258_08 Datasheet, PDF (17/70 Pages) Exar Corporation – 66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT

XR17V258
REV. 1.0.1
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
1.6 Device Configuration Registers
The Device Configuration Registers provide easy programming of general operating parameters to the V258
and for monitoring the status of various functions. These registers control or report on all 8 channel UARTs
functions that include interrupt control and status, 16-bit general purpose timer control and status, multipurpose
inputs/outputs control and status, sleep mode control, soft-reset control, and device identification and revision,
and others. Tables 6 and 7 below show these registers in BYTE and DWORD alignment. Each of these
registers is described in detail in the following paragraphs.
TABLE 6: DEVICE CONFIGURATION REGISTERS SHOWN IN BYTE ALIGNMENT
ADDRESS [A7:A0]
REGISTER
READ/WRITE COMMENT
RESET STATE
Ox080
INT0 [7:0] Read-only Interrupt [7:0]
Bits [7:0] = 0x00
Ox081
INT1 [15:8] Read-only
Bits [7:0] = 0x00
Ox082
INT2 [23:16] Read-only
Bits [7:0] = 0x00
Ox083
INT3 [31:24] Read-only
Bits [7:0] = 0x00
Ox084
Ox085
Ox086
Ox087
TIMERCNTL
TIMER
TIMERLSB
TIMERMSB
Read/Write Timer Control
Reserved
Read/Write Timer LSB
Read/Write Timer MSB
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0]= 0x00
Bits [7:0]= 0x00
Ox088
Ox089
Ox08A
Ox08B
8XMODE
REGA
RESET
SLEEP
Read/Write
Reserved
Write-only Self clear bits after executing Reset
Read/Write Sleep mode
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0]= 0x00
Ox08C
Ox08D
Ox08E
Ox08F
DREV
DVID
REGB
MPIOINT
Read-only Device revision
Read-only Device identification
Write-only
Read/Write MPIO interrupt mask
Bits [7:0] = Current Rev.
Bits [7:0] = 0x38
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Ox090
Ox091
Ox092
Ox093
MPIOLVL
MPIO3T
MPIOINV
MPIOSEL
Read/Write MPIO level control
Read/Write MPIO output control
Read/Write MPIO input polarity select
Read/Write MPIO select
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0xFF
17