XR17V258_08 Datasheet, PDF (15/70 Pages) Exar Corporation – 66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT

REV. 1.0.1
XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
TABLE 5: XR17V258 UART AND DEVICE CONFIGURATION REGISTERS
OFFSET ADDRESS
MEMORY SPACE
0x000 - 0x00F
UART channel 0 Regs
READ/WRITE
(Table 13 &
Table 14)
DATA WIDTH
COMMENT
8/16/24/32 First 8 regs are 16550 compatible
0x010 - 0x07F
0x080 - 0x093
0x094 - 0x0FF
0x100
0x100
0x140 - 0x17F
0x180 - 0x1FF
Reserved
DEVICE CONFIGURA-
TION REGISTERS
Reserved
UART 0 – Read FIFO
UART 0 – Write FIFO
Reserved
UART 0 – Read FIFO
with errors
(Table 6)
Read-Only
Write-Only
Read-Only
8/16/24/32
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0x200 - 0x20F
UART channel 1 Regs
0x210 - 0x2FF
0x300
0x300
0x340 - 0x37F
0x380 - 0x3FF
Reserved
UART 1 – Read FIFO
UART 1 – Write FIFO
Reserved
UART 1 – Read FIFO
with errors
(Table 13 &
Table 14)
Read-Only
Write-Only
Read-Only
8/16//24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0x400 - 0x40F
UART channel 2 Regs
0x410 - 0x4FF
0x500
0x500
0x540 - 0x57F
0x580 - 0x5FF
Reserved
UART 2 – Read FIFO
UART 2 – Write FIFO
Reserved
UART 2 – Read FIFO
with errors
(Table 13 &
Table 14)
Read-Only
Write-Only
Read-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
0x600 - 0x60F
UART channel 3 Regs
0x610 - 0x6FF
0x700
0x700
0x740 - 0x77F
0x780 - 0x7FF
Reserved
UART 3 – Read FIFO
UART 3 – Write FIFO
Reserved
UART 3 – Read FIFO
with errors
(Table 13 &
Table 14)
Read-Only
Write-Only
Read-Only
8/16/24/32 First 8 regs are 16550 compatible
8/16/24/32 64 bytes of RX FIFO data
8/16/24/32 64 bytes of TX FIFO data
16/32 64 bytes of RX FIFO data + LSR
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