ISD-200 Datasheet, PDF (45/64 Pages) List of Unclassifed Manufacturers – USB Mass Storage Class Bulk-Only Specification Compliant

ISD-200 ASIC Datasheet
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PowerDown – Fab only test mode
Table 13 – Test Modes
Test Pin Pull-downs
In order to insure the internal pull-downs for TEST(2:0) are on, TEST(3) must be tied low.
Normal Mode With CLKN Enabled
There are two modes in which the CLKN output clock is initiated before ISD-200 configuration data is
received. The main reason for providing a clock in this manner is to allow an ATA device to use this clock
as a system clock when the ISD-200 configuration data source is to come from the device (See the Vendor-
Specific ATA Commands, Identify section). Two clock frequencies are provided 32 and 40 MHz.
Disable Disk Mode
This mode allows the ISD-200 to temporarily bypass the normal device initialization in a manufacturing
environment in order to program the EEPROM over USB. This mode is NOT to be used as a normal
functional mode.
NandTree Test Mode
This mode disables all outputs except ‘USB_ENUM’ (NandTree output), allowing for testing of input
connectivity. The list below shows the connectivity order of the NandTree chain (beginning to end).
NRESET,
ATA_EN,
IORDY,
DD[15:0], Note: DD[0] first, DD[15] last
NEJECT,
NCART_DET,
BUS_POWER,
SCAN_EN,
I_MODE,
SDA
Input pin connectivity can be tested with the following procedure:
1) Set all inputs on the chain to ‘1’. Output will be ‘1’.
2) Set NRESET to ‘0’. Output will toggle
3) Set NRESET back to ‘1’. Output will toggle.
4) Set '0' on the NandTree chain inputs from the beginning of the chain to the end (in order). The output will toggle with each input
toggle, testing pad / IO cell connectivity.
Limbo Mode
ISD-200 provides a “limbo mode” in which all of its output pads are placed in a high-impedance state.
In-System Design Confidential
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