ISD-200 Datasheet, PDF (10/64 Pages) List of Unclassifed Manufacturers – USB Mass Storage Class Bulk-Only Specification Compliant

ISD-200 ASIC Datasheet
Pin Name
NRESET
CLK12, CLKX
TEST0 – TEST3
SCAN_EN
I_MODE
CLKN
NEJECT
NCART_DET
ATA_EN
DA0 – DA2
DD0 – DD15
NDIOR
NDIOW
NCS0, NCS1
IORDY
IORDY_PU_EN
NATA_RESET
SCL
SDA
NPWR500
TQFP
Dir
Pin #
19
I
25, 24
IO
31, 30, 28, 27
I
35
I
39
I
40
O
21
I
20
I
18
I
54, 55, 53
O
62, 64, 2, 5, 7, 10, 12,
IO
15, 14, 11, 8, 6, 3, 1, 63,
60
56
O
58
O
50, 51
O
49
I
48
O
16
O
38
O
37
IO
29
O
Type
Description
TTL 3.3V
OSC in/out
TTL 3.3V, pull
down
TTL 3.3V, pull
down
TTL 3.3V
4 mA TTL 3.3V
TTL 3.3V
TTL 3.3V
TTL 3.3V, pull
up
4 mA TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
4 mA TTL
5V Fail Safe
4 mA TTL
5V tolerant
4 mA TTL
5V tolerant
4 mA TTL 3.3V
Active low Chip Reset
Crystal connections. 1.8V tolerant only
Test mode inputs. 100K internal pull down
resistors on TEST(2:0)
Manufacturing test pin. Scan mode select input.
100K internal pull down resistor.
USB descriptor and ISD-200 configuration data is
obtained from the device by the vendor-specific
ATAPI (FBh) command. If set (I_MODE=1) and
USB Bus powered (BUS_POWER=1), the device
must be able to respond to the FBh ATAPI
command when nPWR100 is active. I_MODE
operation is not supported in USB Bus powered
systems that require more than 100mA of current
prior to USB enumeration.
Configurable clock output. A digital phase lock
loop provides a configurable clock source for
system integration. (See Errata #1)
Active low media eject request input
Active low Cartridge (media) detected input.
ATA interface / USB enable. Allows ATA bus
sharing with other host devices.
ATA_EN=1 to enable ATA interface.
ATA_EN=0 to 3-state to hi-Z ATA interface,
disable USB interface. 100K internal pull up
resistor (See Errata #2, #5)
ATA Address. ATA66 compliant IO cell.
ATA Data. ATA66 compliant IO cell.
ATA Read Strobe. ATA66 compliant IO cell.
ATA Write Strobe. ATA66 compliant IO cell.
ATA Chip Selects. ATA66 compliant IO cell.
ATA Flow Control. ATA66 compliant IO cell.
ATA IORDY pull-up connection. Active hi, 3-
state to hi-Z off. ATA66 compliant IO cell.
ATA pin Reset. ATA66 compliant IO cell.
Configuration serial ROM clock. Active low, 3-
state to hi-Z off. (See Errata #4)
Configuration serial ROM address/data. Active
low, 3-state to hi-Z off.
Indicates host has enabled use of USB Bus power
(USB configuration set to a value other than 0) up
to the requested amount in the USB descriptor
bMaxPower entry. USB Bus powered devices
must condition power circuitry with the state of
the BUS_POWER signal for correct operation.
Active low, 3-state to hi-Z off
8
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