ISD-200 Datasheet, PDF (44/64 Pages) List of Unclassifed Manufacturers – USB Mass Storage Class Bulk-Only Specification Compliant

ISD-200 ASIC Datasheet
Operational Modes
NEJECT & NCART_DET Pins
These pins are used to trigger remote-wakeup (See Table 8, 0x2F) as well as Event Notification (See
Vendor Specific ATA Commands, EVENT_NOTIFICATION). When asserted low ‘NEJECT’
indicates to ISD200 that an eject button has been pushed. When asserted low, ‘NCART_DET’ indicates
that a cartridge is present. There is an internal 1ms filter on each of these inputs.
I_MODE Pin
I_Mode pin, when asserted high, allows the ISD200 Configuration and USB Descriptor data to be retrieved
from an attached device. (See ISD-200 CONFIGURATION, DATA SOURCES)
ATA_EN Pin
ATA_EN pin allows ATA bus sharing with other host devices. De-asserting (ATA_EN=0) causes the ISD-
200 to 3-state all ATA bus interface pins to hi-Z; de-assert USB_ENUM, and reset all logic except on-
board ROM / serial ROM logic that loads configuration data. This logic remains enabled to allow
configuration data loads for the configurable external clock (CLKN) upon occurrence of chip reset.
Asserting ATA_EN (ATA_EN=1) allows normal operation. In order to insure the internal pull-up for
ATA_EN is on, TEST(3) must be tied low.
Test Mode Pins
TEST(3:0)
Mode Description
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
Normal Mode. This is the default mode of operation, or run time mode. Pull-
downs are on. CLKN is disabled.
Normal Mode. This is the default mode of operation, or run time mode. Pull-
downs are on. CLKN defaults to 32 MHz.
Normal Mode. This is the default mode of operation, or run time mode. Pull-
downs are on. CLKN defaults to 40 Mhz.
NandTree – Allows board level manufacturing tests. See following section.
Scan Mode – Fab only test mode
Limbo Setting this mode disables all output (3-state to hi-Z)
Disable Disk (Normal) - Enable USB enumeration without ATAPI interface.
Pull-downs are on.
Reserved
InTest (T) - Functional test mode with shortened timers. The DPLL and OSC
circuits are still powered with CLKN disabled. Pull-downs are off.
InTest (TM) - Functional test mode with shortened timers and shortened RAM.
The DPLL and OSC circuits are still powered with CLKN defaulting to 32 MHz.
Pull-downs are off.
InTest (TMS) - Functional test mode with shortened timers, shortened RAM,
and skip ATAPI identify boot sequence. The PLL and OSC circuits are still
powered with CLKN defaulting to 40 MHz. Pull-downs are off.
TestMux – Fab only test mode
Scan Mode – Fab only test mode
InTest (BT) – Functional test mode with DPLL bypassed (m=n=1), OSC circuits
disabled (pass through), and shortened timers. Pull-downs are off.
Reserved
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