LM3S610 Datasheet, PDF (354/409 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
Register 3: PWM Output Enable (PWMENABLE), offset 0x008
This register provides a master control of which generated PWM signals are output to device pins.
By disabling a PWM output, the generation process can continue (for example when the time
bases are synchronized) without driving PWM signals to the pins. When bits in this register are
set, the corresponding PWM signal is passed through to the output stage, which is controlled by
the PWMINVERT register. When bits are not set, the PWM signal is replaced by a zero value
which is also passed to the output stage.
PWM Output Enable (PWMENABLE)
Offset 0x008
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PWM5En PWM4En PWM3En PWM2En PWM1En PWM0En
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:6
5
4
3
2
1
0
Name
reserved
PWM5En
PWM4En
PWM3En
PWM2En
PWM1En
PWM0En
Type
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
When set, allows the generated PWM5 signal to be passed
to the device pin.
When set, allows the generated PWM4 signal to be passed
to the device pin.
When set, allows the generated PWM3 signal to be passed
to the device pin.
When set, allows the generated PWM2 signal to be passed
to the device pin.
When set, allows the generated PWM1 signal to be passed
to the device pin.
When set, allows the generated PWM0 signal to be passed
to the device pin.
354
April 27, 2007
Preliminary