LM3S610 Datasheet, PDF (192/409 Pages) List of Unclassifed Manufacturers – Microcontroller

Watchdog Timer
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C
This register is the interrupt clear register. A write of any value to this register clears the Watchdog
interrupt and reloads the 32-bit counter from the WDTLOAD register. Value for a read or reset is
indeterminate.
Watchdog Interrupt Clear (WDTICR)
Offset 0x00C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WDTIntClr
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WDTIntClr
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit/Field
31:0
Name
WDTIntClr
Type
WO
Reset
-
Description
Watchdog Interrupt Clear
192
April 27, 2007
Preliminary