LM3S610 Datasheet, PDF (15/409 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Register 20: SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8..................................................... 308
Register 21: SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC .................................................... 309
Inter-Integrated Circuit (I2C) Interface ........................................................................................ 310
Register 1: I2C Master Slave Address (I2CMSA), offset 0x000 ................................................................ 323
Register 2: I2C Master Control/Status (I2CMCS), offset 0x004................................................................. 324
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I2C Master Data (I2CMDR), offset 0x008................................................................................ 329
I²C Master Timer Period (I2CMTPR), offset 0x00C ................................................................ 330
I²C Master Interrupt Mask (I2CMIMR), offset 0x010 ............................................................... 331
I²C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ...................................................... 332
I²C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ................................................ 333
I²C Master Interrupt Clear (I2CMICR), offset 0x01C ............................................................... 334
I²C Master Configuration (I2CMCR), offset 0x020 .................................................................. 335
I²C Slave Own Address (I2CSOAR), offset 0x000 .................................................................. 336
I²C Slave Control/Status (I2CSCSR), offset 0x004 ................................................................. 337
I²C Slave Data (I2CSDR), offset 0x008................................................................................... 339
I²C Slave Interrupt Mask (I2CSIMR), offset 0x00C ................................................................. 340
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x010......................................................... 341
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x014................................................... 342
I²C Slave Interrupt Clear (I2CSICR), offset 0x018 .................................................................. 343
Pulse Width Modulator (PWM)..................................................................................................... 344
Register 1: PWM Master Control (PWMCTL), offset 0x000....................................................................... 352
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004................................................................. 353
Register 3: PWM Output Enable (PWMENABLE), offset 0x008................................................................ 354
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C............................................................. 355
Register 5: PWM Output Fault (PWMFAULT), offset 0x010...................................................................... 356
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014................................................................. 357
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 .............................................................. 358
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ..................................................... 359
Register 9: PWM Status (PWMSTATUS), offset 0x020............................................................................. 360
Register 10: PWM0 Control (PWM0CTL), offset 0x040............................................................................... 361
Register 11: PWM1 Control (PWM1CTL), offset 0x080............................................................................... 361
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 .............................................................................. 361
Register 13: PWM0 Interrupt/Trigger Enable (PWM0INTEN), offset 0x044 ................................................ 363
Register 14: PWM1 Interrupt/Trigger Enable (PWM1INTEN), offset 0x084 ................................................ 363
Register 15: PWM2 Interrupt/Trigger Enable (PWM2INTEN), offset 0x0C4................................................ 363
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .......................................................... 365
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .......................................................... 365
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8.......................................................... 365
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ................................................. 366
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ................................................. 366
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC................................................. 366
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ............................................................................... 367
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ............................................................................... 367
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0............................................................................... 367
Register 25: PWM0 Counter (PWM0COUNT), offset 0x054 ....................................................................... 368
Register 26: PWM1 Counter (PWM1COUNT), offset 0x094 ....................................................................... 368
Register 27: PWM2 Counter (PWM2COUNT), offset 0x0D4....................................................................... 368
Register 28: PWM0 Compare A (PWM0CMPA), offset 0x058 .................................................................... 369
Register 29: PWM1 Compare A (PWM1CMPA), offset 0x098 .................................................................... 369
April 27, 2007
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Preliminary