AB-2061G-33 Datasheet, PDF (26/32 Pages) List of Unclassifed Manufacturers – 33Mhz PCI to Local Bus Interface

Local Bus Controller Unit
The Local Bus Controller Unit (LBCU) sequences all the operations necessary to
transfer data to and from the microprocessor, both in slave mode (register accesses)
and master mode (DMA transfers).
The LBCU is made up of three units, the Local Slave Sequencer Unit (LSSU), the
Local Data Path Unit (LDPU) and the Local Master Sequencer Unit (LMSU).
(In AB-2061 the LMSU is not present or active).
The LSSU handles all transactions when the microprocessor is driving the local
bus; these transactions are exclusively register accesses.
When the DMA unit requires to transfer data from the local memory to the on-
chip FIFOs or vice versa, it signals the LMSU which obtains control of the local
bus using the BUSREQ and BUSGNT lines, and then sequences the spitting or
assembly of 32 bit words for transfer over 8 or 16 bits. (Only in local bus mastering
capable variants).
The LDPU is the collection of multiplexers required to split or assemble the bytes/
words and long words.
Local Bus Configuration
Local bus configuration is determined at reset by the levels on the MODE[2:0]
pins. The value on these pins MUST NOT change outside the period where
PRST is asserted.
Mode
0
1
2
=1
6502 Type strobes - E, R/W
Non multiplexed bus
8 bit data
=0
Z80 Type strobes - RD, WR
Multiplexed bus
16 bit data
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