AB-2061G-33 Datasheet, PDF (15/32 Pages) List of Unclassifed Manufacturers – 33Mhz PCI to Local Bus Interface

Shared Register Block
These are accessed by the local processor through an indirect method using
REGISTER_ADDRESS and REGISTER_DATAn. The PCI uses memory accesses
and BaseAddress0 to locate these registers.
PCI Local Name
Addr. Indirect
Addr.
0 10(1,0) LPG0
2 10(3,2) LPG1
4 11(1,0) LPG2
6 11(3,2) LPG3
8 12(1,0) LPG4
A 12(3,2) Reserved
C 13(1,0) BD0
E 13(3,2) PG0
1 0 14(1,0) PG1
1 2 14(3,2) PG2
1 4 15(0) PG3
1 5 15(1) BD1
1 6 15(2) PG4
1 7 15(3) Reserved
1 8 16(3-0) PG5
1C 17(3-0) PG6
Width Function
Default
(Interprocessor Communication Register) Value
1 6 Interprocessor Communication Register 0000h
16
“
“
“
0000h
16
“
“
“ 0000h
16
“
“
“ 0000h
16
“
“
“ 0000h
1 6 DO NOT USE
0000h
16
“
“
“ 0000h
16
“
“
“ 0000h
16
“
“
“ 0000h
16
“
“
“ 0000h
8
“
“
“ 0000h
8
“
“
“ 0000h
8
“
“
“ 0000h
8 DO NOT USE
0000h
32
“
“
“ 30343800h
32
“
“
“ 00000000h
Note:
PG4, PG3, PG5, PG6 & BDI are write protected when the
PROTECT_REGISTERS bit in RESOURCE_CONTROL is set.
LPGn - writable by the local processor
PGn - writable by the PCI
BDn - writable by either local or PCI
All shared registers are readable by either the local processor
or the PCI bus.
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