SMH4046 Datasheet, PDF (7/51 Pages) List of Unclassifed Manufacturers – Hot-Swap, Active DC Output Control (ADOCTM) Power Manager with I2C lnterface

SMH4046
Preliminary Information
PIN DESCRIPTIONS (CONTINUED)
Symbol
CARD_12V
VCC12
Pin Type Description
39
I
12V card side supply input. This input is monitored for power integrity. If it falls
below the 12V sense threshold, the CARD_V_VLD signal is de-asserted.
40
I Bus-side 12V input
VCC5V (VDD) 41 PWR This pin supplies power to the SMH4046 and is monitored for power integrity.
FPGA_NSTS 42
FPGA_CFGD
ONE
43
FPGA_NCFG 44
FPGA_DO
45
FPGA_DCLK 46
NC
47
SDA
48
I FPGA configuration status input pin
I FPGA_CFGDONE indicates completion of the configuration process.
O
FPGA_NCFG is a configuration control output. A low transition resets the target
device; a low-to-high transition begins configuration.
O
FPGA_DO provides preamble and configuration data to downstream devices in a
daisy-chain.
O
FPGA Configuration clock output. Clock output used to clock configuration data
using pin FPGA_DO.
NC No Connect
I/O The bidirectional I²C serial data line.
Summit Microelectronics, Inc
2082 1.7 08/23/04
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