SMH4046 Datasheet, PDF (12/51 Pages) List of Unclassifed Manufacturers – Hot-Swap, Active DC Output Control (ADOCTM) Power Manager with I2C lnterface

SMH4046
Preliminary Information
I²C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 100kHz
Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.
See Figure 4 Timing Diagram.
Symbol Description
Conditions
100kHz
Min Typ Max Units
f_SCL
t_LOW
t_HIGH
t_BUF
t_SU:STA
t_HD:STA
t_SU:STO
t_AA
t_DH
t_R
t_F
t_SU:DAT
t_HD:DAT
TI
SCL Clock Frequency
Clock Low Period
Clock High Period
Bus Free Time
Start Condition Setup Time
Start Condition Hold Time
Stop Condition Setup Time
Clock Edge to Data Valid
Data Output Hold Time
SCL and SDA Rise Time
SCL and SDA Fall Time
Data In Setup Time
Data In Hold Time
Noise Filter SCL and SDA
Before New Transmission - Note 1/
SCL low to valid SDA (cycle n)
SCL low (cycle n+1) to SDA change
Note 1/
Note 1/
Noise suppression
0
100 KHz
4.7
µs
4.0
µs
4.7
µs
4.7
µs
4.0
µs
4.7
µs
0.2
3.5 _µs
0.2
µs
1000 ns
300 ns
250
ns
0
ns
100
ns
t_{WR_CONFI}
G
t_{WR_EE}
Write Cycle Time Config
Write Cycle Time EE
Configuration Registers
Memory Array
10 ms
5
ms
Note: 1/ - Guaranteed by Design.
TIMING DIAGRAMS
t_R
SCL
t_SU:SDA
SDA _(IN)
SDA _(OUT)
t_F
t_HD:SDA
t_AA
t_{H IG H}
t_HD:DAT
t_LOW
t_SU:DAT
t_DH
t_SU:STO
Figure 4 - Basic I²C Serial Interface Timing
t_{W R (For W rite O peration Only)}
t_BUF
Summit Microelectronics, Inc
2082 1.7 08/23/04
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