LM3S8938 Datasheet, PDF (474/550 Pages) List of Unclassifed Manufacturers – Microcontroller

Ethernet Controller
Register 24: Ethernet PHY Management Register 16 – Vendor-Specific (MR16),
offset 0x10
This register enables software to configure the operation of vendor specific modes of the PHY.
Ethernet PHY Management Register 16 – Vendor-Specific (MR16)
Base 0x4004.8000
Offset 0x10
Type R/W, reset 0x0140
31
30
29
28
27
26
25
24
23
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
RPTR INPOL reserved TXHIM SQEI NL10
Type R/W
R/W
RO
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
0
8
7
reserved
RO
RO
1
0
22
21
20
19
18
17
16
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
6
5
4
3
2
1
0
APOL RVSPOL
reserved
PCSBP RXCC
RO
R/W
R/W
RO
1
0
0
0
RO
R/W
R/W
0
0
0
Bit/Field
31:16
15
14
13
12
11
Name
reserved
RPTR
INPOL
reserved
TXHIM
SQEI
Type
RO
R/W
R/W
RO
R/W
R/W
Reset
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Repeater Mode
When set, enables the repeater mode of operation. In this mode,
full-duplex is not allowed and the Carrier Sense signal only responds
to receive activity. If the PHY is configured to 10Base-T mode, the SQE
test function is disabled.
Interrupt Polarity
1: Sets the polarity of the PHY interrupt to be active High.
0: Sets the polarity of the PHY interrupt to active Low.
Important: ^{Because the Media Access Controller expects active}
Low interrupts from the PHY, this bit must always be
written with a 0 to ensure proper operation.
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Transmit High Impedance Mode
When set, enables the transmitter High Impedance mode. In this mode,
the TXOP and TXON transmitter pins are put into a high impedance state.
The RXIP and RXIN pins remain fully functional.
0
SQE Inhibit Testing
When set, prohibits 10Base-T SQE testing.
When 0, the SQE testing is performed by generating a Collision pulse
following the completion of the transmission of a frame.
474
June 14, 2007
Luminary Micro Confidential-Advance Product Information