LM3S8938 Datasheet, PDF (112/550 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Register 29: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register.
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type R/W, reset 0x00000000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved EPHY0 reserved EMAC0
reserved
Type RO
R/W
RO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
GPIOG GPIOF GPIOE GPIOD GPIOC GPIOB GPIOA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31
30
29
28
27:7
6
5
4
3
2
1
0
Name
reserved
EPHY0
reserved
EMAC0
reserved
GPIOG
GPIOF
GPIOE
GPIOD
GPIOC
GPIOB
GPIOA
Type
RO
R/W
RO
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for Ethernet PHY unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for Ethernet MAC unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for GPIO Port G.
Reset control for GPIO Port F.
Reset control for GPIO Port E.
Reset control for GPIO Port D.
Reset control for GPIO Port C.
Reset control for GPIO Port B.
Reset control for GPIO Port A.
112
June 14, 2007
Luminary Micro Confidential-Advance Product Information