LM3S317 Datasheet, PDF (210/379 Pages) List of Unclassifed Manufacturers – Microcontroller

Analog-to-Digital Converter (ADC)
11.2.3
11.2.4
11.2.5
11.2.6
When using the "Always" trigger, care must be taken. If a sequence's priority is too high, it is
possible to starve other lower priority sequences.
Hardware Sample Averaging Circuit
Higher precision results can be generated using the hardware averaging circuit, however, the
improved results are at the cost of throughput. Up to 64 samples can be accumulated and
averaged to form a single data entry in the sequencer FIFO. Throughput is decreased
proportionally to the number of samples in the averaging calculation. For example, if the averaging
circuit is configured to average 16 samples, the throughput is decreased by a factor of 16.
By default the averaging circuit is off and all data from the converter passes through to the
sequencer FIFO. The averaging hardware is controlled by the ADC Sample Averaging Control
(ADCSAC) register (see page 222). There is a single averaging circuit and all input channels
receive the same amount of averaging whether they are single-ended or differential.
Analog-to-Digital Converter
The converter itself generates a 10-bit output value for selected analog input. Special analog pads
are used to minimize the distortion on the input.
Test Modes
There is a user-available test mode that allows for loopback operation within the digital portion of
the ADC module. This can be useful for debugging software without having to provide actual
analog stimulus. This mode is available through the ADC Test Mode Loopback (ADCTMLB)
register (see page 235).
Internal Temperature Sensor
The internal temperature sensor provides an analog temperature reading as well as a reference
voltage. The voltage at the output terminal SENSO is given by the following equation:
SENSO = 2.7 - ((T + 55) / 75)
This relation is shown in Figure 11-2 on page 210.
Figure 11-2. Internal Temperature Sensor Characteristic
11.3
Initialization and Configuration
In order for the ADC module to be used, the PLL must be enabled and using a supported crystal
frequency (see the RCC register on page 83). Using unsupported frequencies can cause faulty
operation in the ADC module.
210
May 4, 2007
Preliminary