|
LM3S317 Datasheet, PDF (20/379 Pages) List of Unclassifed Manufacturers – Microcontroller | |||
|
◁ |
Architectural Overview
1 Architectural Overview
The Luminary Micro Stellaris® family of microcontrollersâthe first ARM® Cortexâ¢-M3 based
controllersâbrings high-performance 32-bit computing to cost-sensitive embedded microcontroller
applications. These pioneering parts deliver customers 32-bit performance at a cost equivalent to
legacy 8- and 16-bit devices, all in a package with a small footprint.
The LM3S317 controller in the Stellaris family offers the advantages of ARMâs widely available
development tools, System-on-Chip (SoC) infrastructure IP applications, and a large user
community. Additionally, the controller uses ARMâs Thumb®-compatible Thumb-2 instruction set to
reduce memory requirements and, thereby, cost.
Luminary Micro offers a complete solution to get to market quickly, with a customer development
board, white papers and application notes, and a strong support, sales, and distributor network.
1.1 Product Features
The LM3S317 microcontroller includes the following product features:
 32-Bit RISC Performance
â 32-bit ARM® Cortexâ¢-M3 v7M architecture optimized for small-footprint embedded
applications
â System timer (SysTick) provides a simple, 24-bit clear-on-write, decrementing,
wrap-on-zero counter with a flexible control mechanism
â Thumb®-compatible Thumb-2-only instruction set processor core for high code density
â 25-MHz operation
â Hardware-division and single-cycle-multiplication
â Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt
handling
â 25 interrupts with eight priority levels
â Memory protection unit (MPU) provides a privileged mode for protected operating system
functionality
â Unaligned data access, enabling data to be efficiently packed into memory
â Atomic bit manipulation (bit-banding) delivers maximum memory utilization and
streamlined peripheral control
 Internal Memory
â 16-KB single-cycle flash
⢠User-managed flash block protection on a 2-KB block basis
⢠User-managed flash data programming
⢠User-defined and managed flash-protection block
â 4-KB single-cycle SRAM
 General-Purpose Timers
â Three timers, each of which can be configured: as a single 32-bit timer, as two 16-bit
timers, or to initiate an ADC event
â 32-bit Timer modes:
⢠Programmable one-shot timer
20
May 4, 2007
Preliminary
|
▷ |