LM3S317 Datasheet, PDF (169/379 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S317 Data Sheet
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018
This register allows software to enable/disable GPTM controller-level interrupts. Writing a 1
enables the interrupt, while writing a 0 disables it.
GPTM Interrupt Mask (GPTMIMR)
Offset 0x018
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Type
RO
Reset
0
reserved
RO
RO
RO
0
0
0
CBEIM CBMIM TBTOIM
RO
R/W
R/W
R/W
RO
0
0
0
0
0
reserved
RO
RO
0
0
RTCIM CAEIM CAMIM TATOIM
RO
R/W
R/W
R/W
R/W
0
0
0
0
0
Bit/Field
31:11
10
9
8
7:4
3
2
Name
reserved
CBEIM
CBMIM
TBTOIM
reserved
RTCIM
CAEIM
Type
RO
R/W
R/W
R/W
RO
R/W
R/W
Reset
0
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM CaptureB Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM CaptureB Match Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM TimerB Time-Out Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
Reserved bits return an indeterminate value, and should never
be changed.
GPTM RTC Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM CaptureA Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
May 4, 2007
169
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