LM3S317 Datasheet, PDF (115/379 Pages) List of Unclassifed Manufacturers – Microcontroller

8.1 Block Diagram
Figure 8-1. GPIO Module Block Diagram
PA0
U0Rx
UART0
PA1
U0Tx
PA2
SSICLK
PA3
SSIFss
SSI
PA4
SSIRx
PA5
SSITx
PB0
PWM2
PWM1
PB1
PWM3
Fault
PB2
PB3
PB4
C0-
PB5
C0o
Analog
Comparators
PB6
C0+
PB7
LM3S317 Data Sheet
JTAG
TCK/SWCLK
PC0
SWD/SWO
TMS/SWDIO
PC1
TDI
PC2
TRST
TDO/SWO
PC3
PC4
PC5
PC6
CCP5 GP Timer 2 CCP4
PC7
Fault
PWM0
PD0
PWM0
PWM1
PD1
PD2
PD3
CCP1 GP Timer 0 CCP0
PD4
CCP3 GP Timer 1 CCP2
PD5
PWM4
PE0
PWM2
Fault
PWM5
PE1
LM3S317
8.2 Functional Description
Important: All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S317 microcontroller contains five ports and thus five of these physical GPIO blocks.
May 4, 2007
115
Preliminary