M12S128168A_08 Datasheet, PDF (5/45 Pages) Elite Semiconductor Memory Technology Inc. – 2M x 16 Bit x 4 Banks Synchronous DRAM

ESMT
M12S128168A
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 °C ~ 70 °C )
Parameter
Symbol
Test Condition
CAS
Latency
Operating Current
(One Bank Active)
ICC1
Burst Length = 1
tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA
Version
-6
-7
-10
130
90
60
Unit Note
mA 1
Precharge Standby
Current in power-down
mode
ICC2P
ICC2PS
CKE ≤ VIL(max), tCC =10ns
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
2
mA
2
mA
Precharge Standby
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
20
20
15 mA
Current in non
Input signals are changed one time during 20ns
power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
10
10
9
mA
Active Standby Current
in power-down mode
ICC3P
ICC3PS
CKE ≤ VIL(max), tCC =10ns
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
6
mA
6
Active Standby Current ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
30
30
20 mA
in non power-down
Input signals are changed one time during 2clks
mode
(One Bank Active)
ICC3NS
All other pins ≥ V_DD-0.2V or ≤ 0.2V
CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
20
mA
Operating Current
(Burst Mode)
Refresh Current
IOL= 0Ma, Page Burst
ICC4
All Band Activated, t_CCD = t_{CCD (min)}
ICC5
tRC ≥ tRC(min), tCC=10ns
150
110
mA 1
80
210
180
180 _{mA 2}
Self Refresh Current
ICC6
CKE ≤ 0.2V
2
mA
Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).
2. Refresh period is 64ms. A maximum of eight consecutive AUTO REFRESH commands (with t_RFCmin) can be posted to any
given SDRAM, and the maximum absolute interval between any AUTO REFRESH command and the next AUTO
REFRESH command is 8x15.6 μ s.). Addresses are changed only one time during tCC(min).
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2008
Revision: 1.1
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