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| M12S128168A_08 Datasheet, PDF (40/45 Pages) Elite Semiconductor Memory Technology Inc. – 2M x 16 Bit x 4 Banks Synchronous DRAM | |||
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ESMT
M12S128168A
Active/Precharge Power Down Mode @ CAS Latency = 2, Burst Length = 4
*Note: 1. Both banks should be in idle state prior to entering precharge power down mode.
2. CKE should be set high at least 1CLK + tSS prior to Row active command.
3. Can not violate minimum refresh specification.
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2008
Revision: 1.1
40/45
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