S1K70000 Datasheet, PDF (67/379 Pages) Epson Company – STANDARD CELL / EMBEDDED ARRAY

Chapter 4 Types of Input/Output Buffers and Their Use
4.3.4 Fail Safe Cells
4.3.4.1 Overview
The dual-power-supply Fail Safe cells are outlined in Section 4.2.4.1, “Overview” (the Fail
Safe cells used in the dual-power-supply specification are LVDD cells).
4.3.4.2 Features
For the features of the dual-power-supply Fail Safe cells, refer to Section 4.2.4.2,
“Features.”
4.3.4.3 Usage Precautions
For precautions to be taken when dual-power-supply Fail Safe cells are used, refer to
Section 4.2.4.3, “Usage Precautions.”
4.3.4.4 List of Cells
Table 4-30 Fail Safe Input Buffers List
Cell Name^{*1, *2}
Input Level
Whether Pull-up Resistors are Included
LIFCP#TY
LVCMOS
Pull-up Resistors
LIFHP#TY
LVCMOS Schmitt
Pull-up Resistors
Notes
*1: The # denotes 1 or 2, with the pull-up resistance values corresponding to Type 1 and Type 2,
respectively (for details, refer to Table 4-16).
*2: In addition to the configurations shown in Table 4-30, the Fail Safe input buffers may be
configured without test pins.
Customers desiring to use such configurations should direct inquiries to Epson.
Table 4-31 Fail Safe Output Buffers List
Function
3-state output for high speed
I_OH/I_OL
Type 1
Type 2
Type 3
Type 4
Cell Name^{*1, *2}
LTF#ATY
3-state output for low noise
Type 1
Type 2
Type 3
Type 4
LTF#BTY
Notes
*1: The # denotes 1, 2, 3, or 4, with the IOH/IOL values corresponding to Type 1, Type 2, Type 3, and
Type 4, respectively (for details, refer to Table 4-22).
*2: In addition to the configurations shown in Table 4-31, the Fail Safe output buffers may be
configured without test pins.
Customers desiring to use such configurations should direct inquiries to Epson.
STANDARD CELL S1K70000 SERIES
EPSON
59
EMBEDDED ARRAY S1X70000 SERIES