S1K70000 Datasheet, PDF (369/379 Pages) Epson Company – STANDARD CELL / EMBEDDED ARRAY

Chapter 8 Circuit Design that Takes Testability into Account
Boundary Scan Checksheet
Please confirm the check items listed below before interfacing to Epson, and present the
Design Information Sheet shown on the next page to Epson. Please note that if any
circuit violating these check items exists or any information is omitted, the boundary scan
service cannot be used.
Please confirm the following items before presenting netlists to Epson:
(a) The supported range of instructions complies with Table 8-4.
(b) The circuits described in Section 8.3, “Test Circuit Which Simplifies DC and AC
Testing,” cannot coexist.
(c) Confirm that the external pin names comply with Section 8.8.4, paragraph b
“Character strings usable for external pins.”
(d Regarding dedicated pins
(i) Conduct a check to confirm that five dedicated pins already exist in the netlist.
(ii) For the TMS, TDI, and TRST equivalent pins, use input cells with pull-ups.
(iii) For the TDO equivalent pin, use a 3-state output cell.
(iv) Conduct a check to confirm that the dedicated pins are not shared with any
other functions.
(e) Place I/O cells in the top layer.
(f) Do not use the I/O cells listed in Section 8.8.4, paragraph e.
(g) Boundary scan cells cannot be inserted for oscillation-circuit input/output pins or
external pins that handle analog signals.
(h) Conduct a check to confirm that multibonding and multipads are not used.
STANDARD CELL S1K70000 SERIES
EMBEDDED ARRAY S1X70000 SERIES
EPSON
361