MA17502 Datasheet, PDF (9/30 Pages) Dynex Semiconductor – Radiation Hard MIL-STD-1750A Control Unit

IU interrupt handling is controlled by the CU through three
microcode bits - M04, M05, and M06. Upon receipt of the IRN
signal and after completion of the currently executing
instruction, the CU branches to a microcoded interrupt handling
routine. The microprogram sequence supplies microcoded
control to the lU for reading the highest priority pending
interrupt vector code, which also clears this pending interrupt.
Due to the similarity of interrupt and hold request handling
by the CU, if a Hold and interrupt request are pending at the
end of an instruction sequence the Hold has priority and will be
serviced.
4.5 HOLD SUPPORT
The CU accepts a Hold request in much the same way as
an interrupt request. After the completion of each MlL-STD-
1750A microcode instruction sequence, the CU checks the
status of the HOLDN signal. If the HOLDN signal is low, a
microcoded sequence suspends further internal processing
functions; otherwise, the CU processes a new instruction or
services interrupt requests (Hold requests have priority over
interrupt requests).
The Control Unit responds to an active HOLDN signal, upon
completion of the currently executing instruction, but branching
to a microprogrammed sequence of instructions that suspends
all internal operations. This sequence of microinstructions
allows the processor to resume instruction execution at the
point HOLDN was accepted when the CU regains control of the
processor. The MAS281 remains in the Hold state until HOLDN
is pulled high (if the Hold state was reached through the
hardware interface, HOLDN) or HOLDN is pulsed low (if the
Hold state was reached through software, BPT instruction).
HOLDN should be synchronised to AS falling.
5.0 SOFTWARE CONSIDERATIONS
The MAS281 chip set implements the full MlL-STD-1750A
instruction set. Table 6a gives a brief listing of this instruction
set and provides performance data for each instruction. Table
6b provides a summary of the l/O commands implemented in
MAS281 and MA31751 MMU/BPU hardware. A complete
description of this instruction set is provided in MIL-STD-1705A
(Notice 1). The register set available to the software
programmer is depicted in Figure 3. A discussion of data types,
addressing modes, and benchmarking considerations fol lows.
5.1 DATA TYPES
The MAS281 chip set supports 16-bit fixed-point single
precision, 32-bit fixed-point double-precision, 32-bit floating-
point, and 48-bit extended-precision floatingpoint data types.
Figure 4 depicts the formats of these data types.
All numerical data is represented in two’s complement form.
Floating-point numbers are represented by a fractional two’s
complement mantissa with an 8-bit two’s complement
exponent. The MAS281 expects all floating point operands to
be normalised. If they are not normalised, the results from an
instruction are not defined.
MA17502
Figure 3: Register Set Model
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