MA17502 Datasheet, PDF (14/30 Pages) Dynex Semiconductor – Radiation Hard MIL-STD-1750A Control Unit

MA17502
Cycles*
Operation
Op Code/Ext Mnemonic
Format
M
P
B
Double-Precision Integer
A7
Add
A6
DAR
DA
R
D,DX
1
3
0
4
1
0
Single Precision Integer
Subtract
B1
1X
4X 5
B2
B0
4A 2
SR
SBB
SBBX
SISP
S
SIM
R
B
BX
ISP
D,DX
IM
1
1
0
2
2
0
2
2
0
1
1
0
3
1
0
2
1
0
Decrement Memory by a
B3
Positive Integer
DECM
D,DX
4
1
0
Single Precision Negate
B4
Register
NEG
R
1
1
0
Double-Precision Negate
B5
Register
DNEG
R
1
3
0
Double-Precision Integer
B7
Subtract
B6
DSR
DS
R
D,DX
1
3
0
4
1
0
Single Precision Integer
Multiply with 16-Bit Product
C1
C2
C3
C0
4A 4
MSR
MISP
MISN
MS
MSIM
R
ISP
ISN
D,DX
IM
1
6.5
4a
1
7.5
4a
1
7.5
4a
3
6.5
4a
2
6.5
4a
Single Precision Integer
Multiply with 32-Bit Product
C5
1X
4X 6
C4
4A 3
MR
MB
MBX
M
MIM
R
B
BX
D, DX
IM
1
5
3
2
7
3
2
7
3
3
5
3
2
5
3
Double-Precision Integer
C7
Multiply
C6
DMR
DM
R
D,DX
1
41
4.5a
4
40
4.5a
Single Precision Integer
Divide with 16-Bit Dividend
D1
D2
D3
D0
4A 6
DVR
DISP
DISN
DV
DVIM
R
ISP
ISN
D,DX
IM
1
20.25 5.5a
1
20
5.5a
1
20.5
5.5a
3
20.25 5.5a
2
20.25 5.5a
Single Precision Integer
Divide with 32-Bit Dividend
D5
1X
4X 7
D4
4A 5
DR
DB
DBX
D
DIM
R
R
BX
D,DX
IM
1
21.75 6.5a
2
22.75 6.5a
2
22.75 6.5a
3
21.75 6.5a
2
22.75 6.5a
Double-Precision Integer
D7
Divide
D6
DDR
DD
R
D,DX
1
79.5
5.5a
4
77.5
5.5a
* M = memory, P = processor (5 OSC cycles), B = processor (6 OSC cycles), a = average if more than one alternative exists.
Table 6a (continued): Instruction Summary
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