CY8C27 Datasheet, PDF (95/332 Pages) –

CY8C27xxx Preliminary Data Sheet
13 Register Details
13.1.8
DxBxxCR0
(Timer Control)
Digital Basic/Communication Type B Block Control Register 0
Individual Register Names and Addresses
DBB00CR0 : 0,23h
DBB10CR0 : 0,33h
DBB01CR0 : 0,27h
DBB11CR0 : 0,37h
7
6
5
Access : POR
Bit Name
DCB02CR0 : 0,2Bh
DCB12CR0 : 0,3Bh
4
3
DCB03CR0 : 0,2Fh
DCB13CR0 : 0,3Fh
2
RW : 0
TC Pulse
Width
1
RW : 0
Capture Int
0
RW : 0
Enable
For additional information, reference the “Register Definitions” on page 209 in the Digital Blocks chapter.
Bit
[7:3]
[2]
Name
Reserved
TC Pulse Width
[1]
Capture Int
[0]
Enable
Description
Primary output
0
Terminal Count pulse width is one-half a block clock. Supports a period value of 00h.
1
Terminal Count pulse width is one full block clock.
0
Interrupt is selected with Mode bit 0 in the Function register
1
Block interrupt is caused by a hardware capture event (overrides Mode bit 0 selection).
0
Timer is not enabled.
1
Timer is enabled.
June 2, 2003
Document #: 38-12012 Rev. **
95