BCM43362KUBG Datasheet, PDF (8/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO

BCM43362 Data Sheet
List of Figures
List of Figures
Figure 1: BCM43362 System Block Diagram .................................................................................................... 1
Figure 2: BCM43362 Block Diagram ............................................................................................................... 11
Figure 3: Power Topology ................................................................................................................................ 14
Figure 4: Recommended Oscillator Configuration ........................................................................................... 18
Figure 5: Recommended Circuit to Use with an External Dedicated TCXO .................................................... 19
Figure 6: Recommended Circuit to Use with an External Shared TCXO......................................................... 19
Figure 7: Signal Connections to SDIO Host (SD 4-Bit Mode) .......................................................................... 22
Figure 8: Signal Connections to SDIO Host (SD 1-Bit Mode) .......................................................................... 23
Figure 9: Signal Connections to SDIO Host (gSPI Mode) ............................................................................... 24
Figure 10: gSPI Write Protocol ........................................................................................................................ 25
Figure 11: gSPI Read Protocol ........................................................................................................................ 26
Figure 12: gSPI Command Structure............................................................................................................... 27
Figure 13: gSPI Signal Timing Without Status................................................................................................. 28
Figure 14: gSPI Signal Timing with Status (Response Delay = 0)................................................................... 29
Figure 15: WLAN Boot-Up Sequence .............................................................................................................. 32
Figure 16: 4-Wire Coexistence Wiring ............................................................................................................. 33
Figure 17: WLAN MAC Architecture ................................................................................................................ 35
Figure 18: WLAN PHY Block Diagram............................................................................................................. 39
Figure 19: STBC Receive Block Diagram........................................................................................................ 40
Figure 20: Radio Functional Block Diagram .................................................................................................... 41
Figure 21: WLAN Software Architecture .......................................................................................................... 46
Figure 22: 69-Ball WLBGA Ball Map................................................................................................................ 47
Figure 23: RF Port Location............................................................................................................................. 61
Figure 24: CBUCK Efficiency........................................................................................................................... 70
Figure 25: SDIO Bus Timing (Default Mode) ................................................................................................... 75
Figure 26: SDIO Bus Timing (High-Speed Mode)............................................................................................ 77
Figure 27: gSPI Timing .................................................................................................................................... 78
Figure 28: 69-Ball WLBGA Mechanical Information ........................................................................................ 81
Broadcom®
February 13, 2015 • 43362-DS106-R
IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO
Page 7
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