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BCM43362KUBG Datasheet, PDF (4/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ b/g/n MAC/Baseband/Radio + SDIO | |||
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Revision
43362-DS101-R
43362-DS100-R
Date
2/17/11
7/15/10
Change Description
Updated:
⢠LPO clock to LPO sleep clock throughout the document.
⢠Figure 3: âPower Topology,â on page 15.
⢠âTCXOâ on page 20.
⢠Table 2: âCrystal Oscillator and External Clock Requirements and
Performance,â on page 21.
⢠âExternal 32.768 kHz Low-Power Oscillatorâ on page 22.
⢠Table 3: âExternal 32.768 kHz Low-Power Oscillator Specifications,â
on page 22.
⢠Table 6: âgSPI Registers,â on page 31.
⢠Table 8: âWLBGA Signal Descriptions,â on page 49.
⢠Table 9: âBCM43362 During Reset and After Reset or During Sleep,â
on page 55.
⢠Table 12: âEnvironmental Ratings,â on page 59.
⢠Table 13: âESD Specifications,â on page 59.
⢠Table 14: âRecommended Operating Conditions and DC
Characteristics,â on page 60.
⢠Table 16: âWLAN 2.4 GHz Receiver Performance Specifications,â on
page 62.
⢠Table 17: âWLAN 2.4 GHz Transmitter Performance Specifications,â
on page 65.
⢠Table 18: âGeneral Spurious Emissions Specifications,â on page 67.
⢠Table 19: âCore Buck Regulator,â on page 68.
⢠Table 20: â3.3V LDO (LDO3P3),â on page 71.
⢠Table 21: âCLDO,â on page 72.
⢠Table 22: âLNLDO1,â on page 73.
⢠âgSPI Signal Timingâ on page 78.
Initial release
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